drivers/phy/amlogic/phy-meson-axg-pcie.c
Source file repositories/reference/linux-study-clean/drivers/phy/amlogic/phy-meson-axg-pcie.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/amlogic/phy-meson-axg-pcie.c- Extension
.c- Size
- 4415 bytes
- Lines
- 188
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mod_devicetable.hlinux/module.hlinux/phy/phy.hlinux/regmap.hlinux/reset.hlinux/platform_device.hlinux/bitfield.hdt-bindings/phy/phy.h
Detected Declarations
struct phy_axg_pcie_privfunction phy_axg_pcie_power_onfunction phy_axg_pcie_power_offfunction phy_axg_pcie_initfunction phy_axg_pcie_exitfunction phy_axg_pcie_resetfunction phy_axg_pcie_probe
Annotated Snippet
struct phy_axg_pcie_priv {
struct phy *phy;
struct phy *analog;
struct regmap *regmap;
struct reset_control *reset;
};
static const struct regmap_config phy_axg_pcie_regmap_conf = {
.reg_bits = 8,
.val_bits = 32,
.reg_stride = 4,
.max_register = MESON_PCIE_REG0,
};
static int phy_axg_pcie_power_on(struct phy *phy)
{
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
int ret;
ret = phy_power_on(priv->analog);
if (ret != 0)
return ret;
regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
MESON_PCIE_POWERDOWN, 0);
return 0;
}
static int phy_axg_pcie_power_off(struct phy *phy)
{
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
int ret;
ret = phy_power_off(priv->analog);
if (ret != 0)
return ret;
regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
MESON_PCIE_POWERDOWN, 1);
return 0;
}
static int phy_axg_pcie_init(struct phy *phy)
{
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
int ret;
ret = phy_init(priv->analog);
if (ret != 0)
return ret;
regmap_write(priv->regmap, MESON_PCIE_REG0, MESON_PCIE_PHY_INIT);
return reset_control_reset(priv->reset);
}
static int phy_axg_pcie_exit(struct phy *phy)
{
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
int ret;
ret = phy_exit(priv->analog);
if (ret != 0)
return ret;
return reset_control_reset(priv->reset);
}
static int phy_axg_pcie_reset(struct phy *phy)
{
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
int ret = 0;
ret = phy_reset(priv->analog);
if (ret != 0)
goto out;
ret = reset_control_assert(priv->reset);
if (ret != 0)
goto out;
udelay(MESON_PCIE_RESET_DELAY);
ret = reset_control_deassert(priv->reset);
if (ret != 0)
goto out;
udelay(MESON_PCIE_RESET_DELAY);
out:
return ret;
}
Annotation
- Immediate include surface: `linux/mod_devicetable.h`, `linux/module.h`, `linux/phy/phy.h`, `linux/regmap.h`, `linux/reset.h`, `linux/platform_device.h`, `linux/bitfield.h`, `dt-bindings/phy/phy.h`.
- Detected declarations: `struct phy_axg_pcie_priv`, `function phy_axg_pcie_power_on`, `function phy_axg_pcie_power_off`, `function phy_axg_pcie_init`, `function phy_axg_pcie_exit`, `function phy_axg_pcie_reset`, `function phy_axg_pcie_probe`.
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.