drivers/phy/cadence/phy-cadence-sierra.c

Source file repositories/reference/linux-study-clean/drivers/phy/cadence/phy-cadence-sierra.c

File Facts

System
Linux kernel
Corpus path
drivers/phy/cadence/phy-cadence-sierra.c
Extension
.c
Size
93437 bytes
Lines
2925
Domain
Driver Families
Bucket
drivers/phy
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cdns_sierra_pll_mux_reg_fields {
	struct reg_field	pfdclk_sel_preg;
	struct reg_field	plllc1en_field;
	struct reg_field	termen_field;
};

static const struct cdns_sierra_pll_mux_reg_fields cmn_plllc_pfdclk1_sel_preg[] = {
	[CMN_PLLLC] = {
		.pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC_GEN_PREG, 1, 1),
		.plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 8, 8),
		.termen_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 0, 0),
	},
	[CMN_PLLLC1] = {
		.pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC1_GEN_PREG, 1, 1),
		.plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 8, 8),
		.termen_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 0, 0),
	},
};

struct cdns_sierra_pll_mux {
	struct clk_hw		hw;
	struct regmap_field	*pfdclk_sel_preg;
	struct regmap_field	*plllc1en_field;
	struct regmap_field	*termen_field;
	struct clk_init_data	clk_data;
};

#define to_cdns_sierra_pll_mux(_hw)	\
			container_of(_hw, struct cdns_sierra_pll_mux, hw)

#define PLL0_REFCLK_NAME "pll0_refclk"
#define PLL1_REFCLK_NAME "pll1_refclk"

static const struct clk_parent_data pll_mux_parent_data[][SIERRA_NUM_CMN_PLLC_PARENTS] = {
	[CMN_PLLLC] = {
		{ .fw_name = PLL0_REFCLK_NAME },
		{ .fw_name = PLL1_REFCLK_NAME }
	},
	[CMN_PLLLC1] = {
		{ .fw_name = PLL1_REFCLK_NAME },
		{ .fw_name = PLL0_REFCLK_NAME }
	},
};

static const u32 cdns_sierra_pll_mux_table[][SIERRA_NUM_CMN_PLLC_PARENTS] = {
	[CMN_PLLLC] = { 0, 1 },
	[CMN_PLLLC1] = { 1, 0 },
};

struct cdns_sierra_derived_refclk {
	struct clk_hw           hw;
	struct regmap_field     *cmn_plllc_clk1outdiv_preg;
	struct regmap_field     *cmn_plllc_clk1_en_preg;
	struct clk_init_data	clk_data;
};

#define to_cdns_sierra_derived_refclk(_hw)	\
			container_of(_hw, struct cdns_sierra_derived_refclk, hw)

enum cdns_sierra_phy_type {
	TYPE_NONE,
	TYPE_PCIE,
	TYPE_USB,
	TYPE_SGMII,
	TYPE_QSGMII
};

enum cdns_sierra_ssc_mode {
	NO_SSC,
	EXTERNAL_SSC,
	INTERNAL_SSC
};

struct cdns_sierra_inst {
	struct phy *phy;
	enum cdns_sierra_phy_type phy_type;
	u32 num_lanes;
	u32 mlane;
	struct reset_control *lnk_rst;
	enum cdns_sierra_ssc_mode ssc_mode;
};

struct cdns_reg_pairs {
	u16 val;
	u32 off;
};

struct cdns_sierra_vals {
	const struct cdns_reg_pairs *reg_pairs;
	u32 num_regs;

Annotation

Implementation Notes