drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
Source file repositories/reference/linux-study-clean/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c- Extension
.c- Size
- 19177 bytes
- Lines
- 750
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/delay.hlinux/firmware/imx/ipc.hlinux/firmware/imx/svc/misc.hlinux/io.hlinux/kernel.hlinux/mfd/syscon.hlinux/module.hlinux/of.hlinux/of_platform.hlinux/phy/phy.hlinux/platform_device.hlinux/regmap.hdt-bindings/firmware/imx/rsrc.h
Detected Declarations
struct mixel_dphy_devdatastruct mixel_dphy_cfgstruct mixel_dphy_privenum mixel_dphy_devtypefunction phy_writefunction get_best_ratiofunction mixel_dphy_config_from_optsfunction mixel_phy_set_hs_timingsfunction mixel_dphy_set_pll_paramsfunction mixel_dphy_configure_mipi_dphyfunction mixel_dphy_configure_lvds_phyfunction mixel_dphy_configurefunction mixel_dphy_validate_lvds_phyfunction mixel_dphy_validatefunction mixel_dphy_initfunction mixel_dphy_exitfunction mixel_dphy_power_on_mipi_dphyfunction mixel_dphy_power_on_lvds_phyfunction mixel_dphy_power_onfunction mixel_dphy_power_offfunction mixel_dphy_set_modefunction mixel_dphy_probe
Annotated Snippet
struct mixel_dphy_devdata {
u8 reg_tx_rcal;
u8 reg_auto_pd_en;
u8 reg_rxlprp;
u8 reg_rxcdrp;
u8 reg_rxhs_settle;
bool is_combo; /* MIPI DPHY and LVDS PHY combo */
};
static const struct mixel_dphy_devdata mixel_dphy_devdata[] = {
[MIXEL_IMX8MQ] = {
.reg_tx_rcal = 0x38,
.reg_auto_pd_en = 0x3c,
.reg_rxlprp = 0x40,
.reg_rxcdrp = 0x44,
.reg_rxhs_settle = 0x48,
.is_combo = false,
},
[MIXEL_IMX8QXP] = {
.is_combo = true,
},
};
struct mixel_dphy_cfg {
/* DPHY PLL parameters */
u32 cm;
u32 cn;
u32 co;
/* DPHY register values */
u8 mc_prg_hs_prepare;
u8 m_prg_hs_prepare;
u8 mc_prg_hs_zero;
u8 m_prg_hs_zero;
u8 mc_prg_hs_trail;
u8 m_prg_hs_trail;
u8 rxhs_settle;
};
struct mixel_dphy_priv {
struct mixel_dphy_cfg cfg;
struct regmap *regmap;
struct regmap *lvds_regmap;
struct clk *phy_ref_clk;
const struct mixel_dphy_devdata *devdata;
struct imx_sc_ipc *ipc_handle;
bool is_slave;
int id;
};
static const struct regmap_config mixel_dphy_regmap_config = {
.reg_bits = 8,
.val_bits = 32,
.reg_stride = 4,
.max_register = DPHY_REG_BYPASS_PLL,
.name = "mipi-dphy",
};
static int phy_write(struct phy *phy, u32 value, unsigned int reg)
{
struct mixel_dphy_priv *priv = phy_get_drvdata(phy);
int ret;
ret = regmap_write(priv->regmap, reg, value);
if (ret < 0)
dev_err(&phy->dev, "Failed to write DPHY reg %d: %d\n", reg,
ret);
return ret;
}
/*
* Find a ratio close to the desired one using continued fraction
* approximation ending either at exact match or maximum allowed
* nominator, denominator.
*/
static void get_best_ratio(u32 *pnum, u32 *pdenom, u32 max_n, u32 max_d)
{
u32 a = *pnum;
u32 b = *pdenom;
u32 c;
u32 n[] = {0, 1};
u32 d[] = {1, 0};
u32 whole;
unsigned int i = 1;
while (b) {
i ^= 1;
whole = a / b;
n[i] += (n[i ^ 1] * whole);
d[i] += (d[i ^ 1] * whole);
if ((n[i] > max_n) || (d[i] > max_d)) {
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/delay.h`, `linux/firmware/imx/ipc.h`, `linux/firmware/imx/svc/misc.h`, `linux/io.h`, `linux/kernel.h`.
- Detected declarations: `struct mixel_dphy_devdata`, `struct mixel_dphy_cfg`, `struct mixel_dphy_priv`, `enum mixel_dphy_devtype`, `function phy_write`, `function get_best_ratio`, `function mixel_dphy_config_from_opts`, `function mixel_phy_set_hs_timings`, `function mixel_dphy_set_pll_params`, `function mixel_dphy_configure_mipi_dphy`.
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.