drivers/phy/freescale/phy-fsl-lynx-28g.c

File Facts

System

Linux kernel

Corpus path

drivers/phy/freescale/phy-fsl-lynx-28g.c

Extension

.c

Size

32971 bytes

Lines

1254

Domain

Driver Families

Bucket

drivers/phy

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/bitfield.h
• linux/module.h
• linux/of.h
• linux/phy.h
• linux/phy/phy.h
• linux/platform_device.h
• linux/workqueue.h

Detected Declarations

• struct lynx_28g_proto_conf
• struct lynx_pccr
• struct lynx_28g_priv
• struct lynx_28g_pll
• struct lynx_28g_lane
• struct lynx_28g_priv
• enum lynx_28g_eq_type
• enum lynx_28g_proto_sel
• enum lynx_lane_mode
• function lynx_28g_rmw
• function phy_interface_to_lane_mode
• function lynx_28g_supports_lane_mode
• function lynx_28g_lane_set_nrate
• function lynx_28g_lane_set_pll
• function lynx_28g_power_off
• function lynx_28g_power_on
• function lynx_28g_get_pccr
• function lynx_28g_get_pcvt_offset
• function lynx_pccr_read
• function lynx_pccr_write
• function lynx_pcvt_read
• function lynx_pcvt_write
• function lynx_pcvt_rmw
• function lynx_28g_lane_remap_pll
• function lynx_28g_lane_change_proto_conf
• function lynx_28g_lane_disable_pcvt
• function lynx_28g_lane_enable_pcvt
• function lynx_28g_set_mode
• function lynx_28g_validate
• function lynx_28g_init
• function lynx_28g_pll_read_configuration
• function lynx_28g_cdr_lock_check
• function lynx_28g_lane_read_configuration
• function lynx_28g_probe_lane
• function lynx_28g_probe
• function for_each_available_child_of_node
• function lynx_28g_remove

Annotated Snippet

struct lynx_28g_proto_conf {
	/* LNaGCR0 */
	int proto_sel;
	int if_width;
	/* LNaTECR0 */
	int teq_type;
	int sgn_preq;
	int ratio_preq;
	int sgn_post1q;
	int ratio_post1q;
	int amp_red;
	/* LNaTECR1 */
	int adpt_eq;
	/* LNaRGCR1 */
	int enter_idle_flt_sel;
	int exit_idle_flt_sel;
	int data_lost_th_sel;
	/* LNaRECR0 */
	int gk2ovd;
	int gk3ovd;
	int gk4ovd;
	int gk2ovd_en;
	int gk3ovd_en;
	int gk4ovd_en;
	/* LNaRECR1 ? */
	int eq_offset_ovd;
	int eq_offset_ovd_en;
	/* LNaRECR2 */
	int eq_offset_rng_dbl;
	int eq_blw_sel;
	int eq_boost;
	int spare_in;
	/* LNaRSCCR0 */
	int smp_autoz_d1r;
	int smp_autoz_eg1r;
	/* LNaRCCR0 */
	int rccr0;
	/* LNaTTLCR0 */
	int ttlcr0;
};

static const struct lynx_28g_proto_conf lynx_28g_proto_conf[LANE_MODE_MAX] = {
	[LANE_MODE_1000BASEX_SGMII] = {
		.proto_sel = LNaGCR0_PROTO_SEL_SGMII,
		.if_width = LNaGCR0_IF_WIDTH_10_BIT,
		.teq_type = EQ_TYPE_NO_EQ,
		.sgn_preq = 1,
		.ratio_preq = 0,
		.sgn_post1q = 1,
		.ratio_post1q = 0,
		.amp_red = 6,
		.adpt_eq = 48,
		.enter_idle_flt_sel = 4,
		.exit_idle_flt_sel = 3,
		.data_lost_th_sel = 1,
		.gk2ovd = 0x1f,
		.gk3ovd = 0,
		.gk4ovd = 0,
		.gk2ovd_en = 1,
		.gk3ovd_en = 1,
		.gk4ovd_en = 0,
		.eq_offset_ovd = 0x1f,
		.eq_offset_ovd_en = 0,
		.eq_offset_rng_dbl = 0,
		.eq_blw_sel = 0,
		.eq_boost = 0,
		.spare_in = 0,
		.smp_autoz_d1r = 0,
		.smp_autoz_eg1r = 0,
		.rccr0 = LNaRCCR0_CAL_EN,
		.ttlcr0 = LNaTTLCR0_TTL_SLO_PM_BYP |
			  LNaTTLCR0_DATA_IN_SSC,
	},
	[LANE_MODE_USXGMII] = {
		.proto_sel = LNaGCR0_PROTO_SEL_XFI,
		.if_width = LNaGCR0_IF_WIDTH_20_BIT,
		.teq_type = EQ_TYPE_2TAP,
		.sgn_preq = 1,
		.ratio_preq = 0,
		.sgn_post1q = 1,
		.ratio_post1q = 3,
		.amp_red = 7,
		.adpt_eq = 48,
		.enter_idle_flt_sel = 0,
		.exit_idle_flt_sel = 0,
		.data_lost_th_sel = 0,
		.gk2ovd = 0,
		.gk3ovd = 0,
		.gk4ovd = 0,
		.gk2ovd_en = 0,

Annotation

• Immediate include surface: `linux/bitfield.h`, `linux/module.h`, `linux/of.h`, `linux/phy.h`, `linux/phy/phy.h`, `linux/platform_device.h`, `linux/workqueue.h`.
• Detected declarations: `struct lynx_28g_proto_conf`, `struct lynx_pccr`, `struct lynx_28g_priv`, `struct lynx_28g_pll`, `struct lynx_28g_lane`, `struct lynx_28g_priv`, `enum lynx_28g_eq_type`, `enum lynx_28g_proto_sel`, `enum lynx_lane_mode`, `function lynx_28g_rmw`.
• Atlas domain: Driver Families / drivers/phy.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.