drivers/phy/lantiq/Kconfig

Source file repositories/reference/linux-study-clean/drivers/phy/lantiq/Kconfig

File Facts

System: Linux kernel
Corpus path: drivers/phy/lantiq/Kconfig
Extension: [no extension]
Size: 603 bytes
Lines: 22
Domain: Driver Families
Bucket: drivers/phy
Inferred role: Driver Families: build/configuration rule
Status: atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only
#
# Phy drivers for Lantiq / Intel platforms
#
config PHY_LANTIQ_VRX200_PCIE
	tristate "Lantiq VRX200/ARX300 PCIe PHY"
	depends on SOC_TYPE_XWAY || COMPILE_TEST
	depends on OF && HAS_IOMEM
	select GENERIC_PHY
	select REGMAP_MMIO
	help
	  Support for the PCIe PHY(s) on the Lantiq / Intel VRX200 and ARX300
	  family SoCs.
	  If unsure, say N.

config PHY_LANTIQ_RCU_USB2
	tristate "Lantiq XWAY SoC RCU based USB PHY"
	depends on OF && (SOC_TYPE_XWAY || COMPILE_TEST)
	select GENERIC_PHY
	help
	  Support for the USB PHY(s) on the Lantiq / Intel XWAY family SoCs.

Annotation

Atlas domain: Driver Families / drivers/phy.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.