drivers/phy/microchip/lan966x_serdes_regs.h

Source file repositories/reference/linux-study-clean/drivers/phy/microchip/lan966x_serdes_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/phy/microchip/lan966x_serdes_regs.h
Extension
.h
Size
8719 bytes
Lines
252
Domain
Driver Families
Bucket
drivers/phy
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _LAN966X_SERDES_REGS_H_
#define _LAN966X_SERDES_REGS_H_

#include <linux/bitfield.h>
#include <linux/types.h>
#include <linux/bug.h>

enum lan966x_target {
	TARGET_HSIO = 32,
	NUM_TARGETS = 66
};

#define __REG(...)    __VA_ARGS__

/*      HSIO:SD:SD_CFG */
#define HSIO_SD_CFG(g)            __REG(TARGET_HSIO, 0, 1, 8, g, 3, 32, 0, 0, 1, 4)

#define HSIO_SD_CFG_PHY_RESET                    BIT(27)
#define HSIO_SD_CFG_PHY_RESET_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_PHY_RESET, x)
#define HSIO_SD_CFG_PHY_RESET_GET(x)\
	FIELD_GET(HSIO_SD_CFG_PHY_RESET, x)

#define HSIO_SD_CFG_TX_RESET                     BIT(18)
#define HSIO_SD_CFG_TX_RESET_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_RESET, x)
#define HSIO_SD_CFG_TX_RESET_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_RESET, x)

#define HSIO_SD_CFG_TX_RATE                      GENMASK(17, 16)
#define HSIO_SD_CFG_TX_RATE_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_RATE, x)
#define HSIO_SD_CFG_TX_RATE_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_RATE, x)

#define HSIO_SD_CFG_TX_INVERT                    BIT(15)
#define HSIO_SD_CFG_TX_INVERT_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_INVERT, x)
#define HSIO_SD_CFG_TX_INVERT_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_INVERT, x)

#define HSIO_SD_CFG_TX_EN                        BIT(14)
#define HSIO_SD_CFG_TX_EN_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_EN, x)
#define HSIO_SD_CFG_TX_EN_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_EN, x)

#define HSIO_SD_CFG_TX_DATA_EN                   BIT(12)
#define HSIO_SD_CFG_TX_DATA_EN_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_DATA_EN, x)
#define HSIO_SD_CFG_TX_DATA_EN_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_DATA_EN, x)

#define HSIO_SD_CFG_TX_CM_EN                     BIT(11)
#define HSIO_SD_CFG_TX_CM_EN_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_TX_CM_EN, x)
#define HSIO_SD_CFG_TX_CM_EN_GET(x)\
	FIELD_GET(HSIO_SD_CFG_TX_CM_EN, x)

#define HSIO_SD_CFG_LANE_10BIT_SEL               BIT(10)
#define HSIO_SD_CFG_LANE_10BIT_SEL_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_LANE_10BIT_SEL, x)
#define HSIO_SD_CFG_LANE_10BIT_SEL_GET(x)\
	FIELD_GET(HSIO_SD_CFG_LANE_10BIT_SEL, x)

#define HSIO_SD_CFG_RX_TERM_EN                   BIT(9)
#define HSIO_SD_CFG_RX_TERM_EN_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_RX_TERM_EN, x)
#define HSIO_SD_CFG_RX_TERM_EN_GET(x)\
	FIELD_GET(HSIO_SD_CFG_RX_TERM_EN, x)

#define HSIO_SD_CFG_RX_RESET                     BIT(8)
#define HSIO_SD_CFG_RX_RESET_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_RX_RESET, x)
#define HSIO_SD_CFG_RX_RESET_GET(x)\
	FIELD_GET(HSIO_SD_CFG_RX_RESET, x)

#define HSIO_SD_CFG_RX_RATE                      GENMASK(7, 6)
#define HSIO_SD_CFG_RX_RATE_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_RX_RATE, x)
#define HSIO_SD_CFG_RX_RATE_GET(x)\
	FIELD_GET(HSIO_SD_CFG_RX_RATE, x)

#define HSIO_SD_CFG_RX_PLL_EN                    BIT(5)
#define HSIO_SD_CFG_RX_PLL_EN_SET(x)\
	FIELD_PREP(HSIO_SD_CFG_RX_PLL_EN, x)
#define HSIO_SD_CFG_RX_PLL_EN_GET(x)\
	FIELD_GET(HSIO_SD_CFG_RX_PLL_EN, x)

#define HSIO_SD_CFG_RX_INVERT                    BIT(3)

Annotation

Implementation Notes