drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

Source file repositories/reference/linux-study-clean/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

File Facts

System
Linux kernel
Corpus path
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
Extension
.c
Size
237643 bytes
Lines
5542
Domain
Driver Families
Bucket
drivers/phy
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct qmp_pcie_offsets {
	u16 serdes;
	u16 pcs;
	u16 pcs_misc;
	u16 pcs_lane1;
	u16 tx;
	u16 rx;
	u16 tx2;
	u16 rx2;
	u16 txz;
	u16 rxz;
	u16 txrxz;
	u16 ln_shrd;
};

struct qmp_phy_cfg_tbls {
	const struct qmp_phy_init_tbl *serdes;
	int serdes_num;
	const struct qmp_phy_init_tbl *tx;
	int tx_num;
	const struct qmp_phy_init_tbl *rx;
	int rx_num;
	const struct qmp_phy_init_tbl *txz;
	int txz_num;
	const struct qmp_phy_init_tbl *rxz;
	int rxz_num;
	const struct qmp_phy_init_tbl *pcs;
	int pcs_num;
	const struct qmp_phy_init_tbl *pcs_misc;
	int pcs_misc_num;
	const struct qmp_phy_init_tbl *pcs_lane1;
	int pcs_lane1_num;
	const struct qmp_phy_init_tbl *ln_shrd;
	int ln_shrd_num;
};

/* struct qmp_phy_cfg - per-PHY initialization config */
struct qmp_phy_cfg {
	int lanes;

	const struct qmp_pcie_offsets *offsets;

	/* Main init sequence for PHY blocks - serdes, tx, rx, pcs */
	const struct qmp_phy_cfg_tbls tbls;
	/*
	 * Additional init sequences for PHY blocks, providing additional
	 * register programming. They are used for providing separate sequences
	 * for the Root Complex and End Point use cases.
	 *
	 * If EP mode is not supported, both tables can be left unset.
	 */
	const struct qmp_phy_cfg_tbls *tbls_rc;
	const struct qmp_phy_cfg_tbls *tbls_ep;

	const struct qmp_phy_init_tbl *serdes_4ln_tbl;
	int serdes_4ln_num;

	/* resets to be requested */
	const char * const *reset_list;
	int num_resets;
	/* regulators to be requested */
	const char * const *vreg_list;
	int num_vregs;

	/* array of registers with different offsets */
	const unsigned int *regs;

	unsigned int pwrdn_ctrl;
	/* bit offset of PHYSTATUS in QPHY_PCS_STATUS register */
	unsigned int phy_status;

	bool skip_start_delay;

	/* QMP PHY pipe clock interface rate */
	unsigned long pipe_clock_rate;

	/* QMP PHY AUX clock interface rate */
	unsigned long aux_clock_rate;
};

struct qmp_pcie {
	struct device *dev;

	const struct qmp_phy_cfg *cfg;
	bool tcsr_4ln_config;
	bool skip_init;

	void __iomem *serdes;
	void __iomem *pcs;
	void __iomem *pcs_misc;

Annotation

Implementation Notes