drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v4.h

File Facts

System

Linux kernel

Corpus path

drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v4.h

Extension

.h

Size

1469 bytes

Lines

35

Domain

Driver Families

Bucket

drivers/phy

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef QCOM_PHY_QMP_PCS_USB_V4_H_
#define QCOM_PHY_QMP_PCS_USB_V4_H_

/* Only for QMP V4 PHY - USB3 PCS registers */
#define QPHY_V4_PCS_USB3_POWER_STATE_CONFIG1		0x000
#define QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_STATUS		0x004
#define QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL		0x008
#define QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL2		0x00c
#define QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_SOURCE_STATUS	0x010
#define QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR		0x014
#define QPHY_V4_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL	0x018
#define QPHY_V4_PCS_USB3_LFPS_TX_ECSTART		0x01c
#define QPHY_V4_PCS_USB3_LFPS_PER_TIMER_VAL		0x020
#define QPHY_V4_PCS_USB3_LFPS_TX_END_CNT_U3_START	0x024
#define QPHY_V4_PCS_USB3_RXEQTRAINING_LOCK_TIME		0x028
#define QPHY_V4_PCS_USB3_RXEQTRAINING_WAIT_TIME		0x02c
#define QPHY_V4_PCS_USB3_RXEQTRAINING_CTLE_TIME		0x030
#define QPHY_V4_PCS_USB3_RXEQTRAINING_WAIT_TIME_S2	0x034
#define QPHY_V4_PCS_USB3_RXEQTRAINING_DFE_TIME_S2	0x038
#define QPHY_V4_PCS_USB3_RCVR_DTCT_DLY_U3_L		0x03c
#define QPHY_V4_PCS_USB3_RCVR_DTCT_DLY_U3_H		0x040
#define QPHY_V4_PCS_USB3_ARCVR_DTCT_EN_PERIOD		0x044
#define QPHY_V4_PCS_USB3_ARCVR_DTCT_CM_DLY		0x048
#define QPHY_V4_PCS_USB3_TXONESZEROS_RUN_LENGTH		0x04c
#define QPHY_V4_PCS_USB3_ALFPS_DEGLITCH_VAL		0x050
#define QPHY_V4_PCS_USB3_SIGDET_STARTUP_TIMER_VAL	0x054
#define QPHY_V4_PCS_USB3_TEST_CONTROL			0x058

#endif

Annotation

• Atlas domain: Driver Families / drivers/phy.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.