drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v8.h

File Facts

System

Linux kernel

Corpus path

drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v8.h

Extension

.h

Size

1634 bytes

Lines

39

Domain

Driver Families

Bucket

drivers/phy

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef QCOM_PHY_QMP_PCS_USB_V8_H_
#define QCOM_PHY_QMP_PCS_USB_V8_H_

#define QPHY_V8_PCS_USB_POWER_STATE_CONFIG1		0x00
#define QPHY_V8_PCS_USB_AUTONOMOUS_MODE_STATUS		0x04
#define QPHY_V8_PCS_USB_AUTONOMOUS_MODE_CTRL		0x08
#define QPHY_V8_PCS_USB_AUTONOMOUS_MODE_CTRL2		0x0c
#define QPHY_V8_PCS_USB_LFPS_RXTERM_IRQ_SOURCE_STATUS	0x10
#define QPHY_V8_PCS_USB_LFPS_RXTERM_IRQ_CLEAR		0x14
#define QPHY_V8_PCS_USB_LFPS_DET_HIGH_COUNT_VAL		0x18
#define QPHY_V8_PCS_USB_LFPS_TX_ECSTART			0x1c
#define QPHY_V8_PCS_USB_LFPS_PER_TIMER_VAL		0x20
#define QPHY_V8_PCS_USB_LFPS_TX_END_CNT_U3_START	0x24
#define QPHY_V8_PCS_USB_LFPS_CONFIG1			0x28
#define QPHY_V8_PCS_USB_RXEQTRAINING_LOCK_TIME		0x2c
#define QPHY_V8_PCS_USB_RXEQTRAINING_WAIT_TIME		0x30
#define QPHY_V8_PCS_USB_RXEQTRAINING_CTLE_TIME		0x34
#define QPHY_V8_PCS_USB_RXEQTRAINING_WAIT_TIME_S2	0x38
#define QPHY_V8_PCS_USB_RXEQTRAINING_DFE_TIME_S2	0x3c
#define QPHY_V8_PCS_USB_RCVR_DTCT_DLY_U3_L		0x40
#define QPHY_V8_PCS_USB_RCVR_DTCT_DLY_U3_H		0x44
#define QPHY_V8_PCS_USB_ARCVR_DTCT_EN_PERIOD		0x48
#define QPHY_V8_PCS_USB_ARCVR_DTCT_CM_DLY		0x4c
#define QPHY_V8_PCS_USB_TXONESZEROS_RUN_LENGTH		0x50
#define QPHY_V8_PCS_USB_ALFPS_DEGLITCH_VAL		0x54
#define QPHY_V8_PCS_USB_SIGDET_STARTUP_TIMER_VAL	0x58
#define QPHY_V8_PCS_USB_TEST_CONTROL			0x5c
#define QPHY_V8_PCS_USB_RXTERMINATION_DLY_SEL		0x60
#define QPHY_V8_PCS_USB_POWER_STATE_CONFIG2		0x64
#define QPHY_V8_PCS_USB_POWER_STATE_CONFIG3		0x68
#define QPHY_V8_PCS_USB_POWER_STATE_CONFIG4		0x6c

#endif

Annotation

• Atlas domain: Driver Families / drivers/phy.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.