drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h
Source file repositories/reference/linux-study-clean/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h- Extension
.h- Size
- 581 bytes
- Lines
- 20
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef QCOM_PHY_QMP_PCS_V6_20_H_
#define QCOM_PHY_QMP_PCS_V6_20_H_
/* Only for QMP V6_20 PHY - USB/PCIe PCS registers */
#define QPHY_V6_20_PCS_G12S1_TXDEEMPH_M6DB 0x170
#define QPHY_V6_20_PCS_G3S2_PRE_GAIN 0x178
#define QPHY_V6_20_PCS_RX_SIGDET_LVL 0x190
#define QPHY_V6_20_PCS_COM_ELECIDLE_DLY_SEL 0x1b8
#define QPHY_V6_20_PCS_TX_RX_CONFIG1 0x1dc
#define QPHY_V6_20_PCS_TX_RX_CONFIG2 0x1e0
#define QPHY_V6_20_PCS_EQ_CONFIG4 0x1f8
#define QPHY_V6_20_PCS_EQ_CONFIG5 0x1fc
#endifAnnotation
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.