drivers/phy/qualcomm/phy-qcom-qmp-usb.c

Source file repositories/reference/linux-study-clean/drivers/phy/qualcomm/phy-qcom-qmp-usb.c

File Facts

System
Linux kernel
Corpus path
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
Extension
.c
Size
102068 bytes
Lines
2525
Domain
Driver Families
Bucket
drivers/phy
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct qmp_usb_offsets {
	u16 serdes;
	u16 pcs;
	u16 pcs_misc;
	u16 pcs_usb;
	u16 tx;
	u16 rx;
};

/* struct qmp_phy_cfg - per-PHY initialization config */
struct qmp_phy_cfg {
	const struct qmp_usb_offsets *offsets;

	/* Init sequence for PHY blocks - serdes, tx, rx, pcs */
	const struct qmp_phy_init_tbl *serdes_tbl;
	int serdes_tbl_num;
	const struct qmp_phy_init_tbl *tx_tbl;
	int tx_tbl_num;
	const struct qmp_phy_init_tbl *rx_tbl;
	int rx_tbl_num;
	const struct qmp_phy_init_tbl *pcs_tbl;
	int pcs_tbl_num;
	const struct qmp_phy_init_tbl *pcs_usb_tbl;
	int pcs_usb_tbl_num;

	/* regulators to be requested */
	const struct regulator_bulk_data *vreg_list;
	int num_vregs;

	/* array of registers with different offsets */
	const unsigned int *regs;

	/* true, if PHY needs delay after POWER_DOWN */
	bool has_pwrdn_delay;

	/* Offset from PCS to PCS_USB region */
	unsigned int pcs_usb_offset;
};

struct qmp_usb {
	struct device *dev;

	const struct qmp_phy_cfg *cfg;

	void __iomem *serdes;
	void __iomem *pcs;
	void __iomem *pcs_misc;
	void __iomem *pcs_usb;
	void __iomem *tx;
	void __iomem *rx;

	struct clk *pipe_clk;
	struct clk_bulk_data *clks;
	int num_clks;
	int num_resets;
	struct reset_control_bulk_data *resets;
	struct regulator_bulk_data *vregs;

	enum phy_mode mode;

	struct phy *phy;

	struct clk_fixed_rate pipe_clk_fixed;
};

static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
{
	u32 reg;

	reg = readl(base + offset);
	reg |= val;
	writel(reg, base + offset);

	/* ensure that above write is through */
	readl(base + offset);
}

static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)
{
	u32 reg;

	reg = readl(base + offset);
	reg &= ~val;
	writel(reg, base + offset);

	/* ensure that above write is through */
	readl(base + offset);
}

/* list of clocks required by phy */

Annotation

Implementation Notes