drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h

Source file repositories/reference/linux-study-clean/drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h

File Facts

System: Linux kernel
Corpus path: drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h
Extension: .h
Size: 1376 bytes
Lines: 34
Domain: Driver Families
Bucket: drivers/phy
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef QCOM_PHY_QMP_USB43_PCS_V8_H_
#define QCOM_PHY_QMP_USB43_PCS_V8_H_

#define QPHY_V8_USB43_PCS_SW_RESET				0x000
#define QPHY_V8_USB43_PCS_PCS_STATUS1				0x014
#define QPHY_V8_USB43_PCS_POWER_DOWN_CONTROL			0x040
#define QPHY_V8_USB43_PCS_START_CONTROL				0x044
#define QPHY_V8_USB43_PCS_POWER_STATE_CONFIG1			0x090
#define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG1			0x0c4
#define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG2			0x0c8
#define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG3			0x0cc
#define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG6			0x0d8
#define QPHY_V8_USB43_PCS_REFGEN_REQ_CONFIG1			0x0dc
#define QPHY_V8_USB43_PCS_RX_SIGDET_LVL				0x188
#define QPHY_V8_USB43_PCS_RCVR_DTCT_DLY_P1U2_L			0x190
#define QPHY_V8_USB43_PCS_RCVR_DTCT_DLY_P1U2_H			0x194
#define QPHY_V8_USB43_PCS_RATE_SLEW_CNTRL1			0x198
#define QPHY_V8_USB43_PCS_TSYNC_RSYNC_TIME			0x1ac
#define QPHY_V8_USB43_PCS_RX_CONFIG				0x1b0
#define QPHY_V8_USB43_PCS_TSYNC_DLY_TIME			0x1b4
#define QPHY_V8_USB43_PCS_ALIGN_DETECT_CONFIG1			0x1c0
#define QPHY_V8_USB43_PCS_ALIGN_DETECT_CONFIG2			0x1c4
#define QPHY_V8_USB43_PCS_PCS_TX_RX_CONFIG			0x1d0
#define QPHY_V8_USB43_PCS_EQ_CONFIG1				0x1dc
#define QPHY_V8_USB43_PCS_EQ_CONFIG2				0x1e0
#define QPHY_V8_USB43_PCS_EQ_CONFIG5				0x1ec

#endif

Annotation

Atlas domain: Driver Families / drivers/phy.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.