drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

Source file repositories/reference/linux-study-clean/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

File Facts

System
Linux kernel
Corpus path
drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
Extension
.c
Size
27531 bytes
Lines
879
Domain
Driver Families
Bucket
drivers/phy
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct inno_video_phy_plat_data {
	const struct inno_mipi_dphy_timing *inno_mipi_dphy_timing_table;
	const unsigned int num_timings;
	enum phy_max_rate max_rate;
	unsigned int max_lanes;
};

struct inno_dsidphy {
	struct device *dev;
	struct clk *ref_clk;
	struct clk *pclk_phy;
	struct clk *pclk_host;
	const struct inno_video_phy_plat_data *pdata;
	void __iomem *phy_base;
	void __iomem *host_base;
	struct reset_control *rst;
	enum phy_mode mode;
	struct phy_configure_opts_mipi_dphy dphy_cfg;

	struct clk *pll_clk;
	struct {
		struct clk_hw hw;
		u8 prediv;
		u16 fbdiv;
		unsigned long rate;
	} pll;
};

enum {
	REGISTER_PART_ANALOG,
	REGISTER_PART_DIGITAL,
	REGISTER_PART_CLOCK_LANE,
	REGISTER_PART_DATA0_LANE,
	REGISTER_PART_DATA1_LANE,
	REGISTER_PART_DATA2_LANE,
	REGISTER_PART_DATA3_LANE,
	REGISTER_PART_LVDS,
};

struct inno_mipi_dphy_timing {
	unsigned long rate;
	u8 lpx;
	u8 hs_prepare;
	u8 clk_lane_hs_zero;
	u8 data_lane_hs_zero;
	u8 hs_trail;
};

static const
struct inno_mipi_dphy_timing inno_mipi_dphy_timing_table_max_1ghz[] = {
	{ 110000000, 0x0, 0x20, 0x16, 0x02, 0x22},
	{ 150000000, 0x0, 0x06, 0x16, 0x03, 0x45},
	{ 200000000, 0x0, 0x18, 0x17, 0x04, 0x0b},
	{ 250000000, 0x0, 0x05, 0x17, 0x05, 0x16},
	{ 300000000, 0x0, 0x51, 0x18, 0x06, 0x2c},
	{ 400000000, 0x0, 0x64, 0x19, 0x07, 0x33},
	{ 500000000, 0x0, 0x20, 0x1b, 0x07, 0x4e},
	{ 600000000, 0x0, 0x6a, 0x1d, 0x08, 0x3a},
	{ 700000000, 0x0, 0x3e, 0x1e, 0x08, 0x6a},
	{ 800000000, 0x0, 0x21, 0x1f, 0x09, 0x29},
	{1000000000, 0x0, 0x09, 0x20, 0x09, 0x27},
};

static const
struct inno_mipi_dphy_timing inno_mipi_dphy_timing_table_max_1_5ghz[] = {
	{ 110, 0x02, 0x7f, 0x16, 0x02, 0x02},
	{ 150, 0x02, 0x7f, 0x16, 0x03, 0x02},
	{ 200, 0x02, 0x7f, 0x17, 0x04, 0x02},
	{ 250, 0x02, 0x7f, 0x17, 0x05, 0x04},
	{ 300, 0x02, 0x7f, 0x18, 0x06, 0x04},
	{ 400, 0x03, 0x7e, 0x19, 0x07, 0x04},
	{ 500, 0x03, 0x7c, 0x1b, 0x07, 0x08},
	{ 600, 0x03, 0x70, 0x1d, 0x08, 0x10},
	{ 700, 0x05, 0x40, 0x1e, 0x08, 0x30},
	{ 800, 0x05, 0x02, 0x1f, 0x09, 0x30},
	{1000, 0x05, 0x08, 0x20, 0x09, 0x30},
	{1200, 0x06, 0x03, 0x32, 0x14, 0x0f},
	{1400, 0x09, 0x03, 0x32, 0x14, 0x0f},
	{1500, 0x0d, 0x42, 0x36, 0x0e, 0x0f},
};

static const
struct inno_mipi_dphy_timing inno_mipi_dphy_timing_table_max_2_5ghz[] = {
	{ 110000000, 0x02, 0x7f, 0x16, 0x02, 0x02},
	{ 150000000, 0x02, 0x7f, 0x16, 0x03, 0x02},
	{ 200000000, 0x02, 0x7f, 0x17, 0x04, 0x02},
	{ 250000000, 0x02, 0x7f, 0x17, 0x05, 0x04},
	{ 300000000, 0x02, 0x7f, 0x18, 0x06, 0x04},
	{ 400000000, 0x03, 0x7e, 0x19, 0x07, 0x04},
	{ 500000000, 0x03, 0x7c, 0x1b, 0x07, 0x08},

Annotation

Implementation Notes