drivers/phy/rockchip/phy-rockchip-usbdp.c
Source file repositories/reference/linux-study-clean/drivers/phy/rockchip/phy-rockchip-usbdp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/rockchip/phy-rockchip-usbdp.c- Extension
.c- Size
- 43197 bytes
- Lines
- 1667
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dt-bindings/phy/phy.hlinux/bitfield.hlinux/bits.hlinux/clk.hlinux/delay.hlinux/gpio.hlinux/mfd/syscon.hlinux/mod_devicetable.hlinux/module.hlinux/mutex.hlinux/phy/phy.hlinux/platform_device.hlinux/property.hlinux/regmap.hlinux/reset.hlinux/usb/ch9.hlinux/usb/typec_dp.hlinux/usb/typec_mux.h
Detected Declarations
struct rk_udphy_grf_regstruct rk_udphy_grf_cfgstruct rk_udphy_vogrf_cfgstruct rk_udphy_dp_tx_drv_ctrlstruct rk_udphy_cfgstruct rk_udphyfunction rk_udphy_grfreg_writefunction rk_udphy_clk_initfunction rk_udphy_reset_assert_allfunction rk_udphy_reset_deassert_allfunction rk_udphy_reset_deassertfunction rk_udphy_reset_initfunction rk_udphy_u3_port_disablefunction rk_udphy_usb_bvalid_enablefunction rk_udphy_dplane_selectfunction rk_udphy_dplane_getfunction rk_udphy_dplane_enablefunction rk_udphy_dp_hpd_event_triggerfunction rk_udphy_set_typec_default_mappingfunction rk_udphy_orien_sw_setfunction rk_udphy_orien_switch_unregisterfunction rk_udphy_setup_orien_switchfunction rk_udphy_refclk_setfunction rk_udphy_status_checkfunction rk_udphy_initfunction rk_udphy_setupfunction rk_udphy_disablefunction rk_udphy_parse_lane_mux_datafunction rk_udphy_get_initial_statusfunction rk_udphy_parse_dtfunction rk_udphy_power_onfunction rk_udphy_power_offfunction rk_udphy_dp_phy_initfunction rk_udphy_dp_phy_exitfunction rk_udphy_dp_phy_power_onfunction rk_udphy_dp_phy_power_offfunction rk_udphy_dp_phy_verify_link_ratefunction rk_udphy_dp_phy_verify_lanesfunction rk_udphy_dp_phy_verify_voltagesfunction rk_udphy_dp_set_voltagefunction rk_udphy_dp_phy_configurefunction rk_udphy_usb3_phy_initfunction rk_udphy_usb3_phy_exitfunction rk_udphy_typec_mux_setfunction rk_udphy_typec_mux_unregisterfunction rk_udphy_setup_typec_muxfunction rk_udphy_probefunction rk_udphy_resume
Annotated Snippet
struct rk_udphy_grf_reg {
unsigned int offset;
unsigned int disable;
unsigned int enable;
};
#define _RK_UDPHY_GEN_GRF_REG(offset, mask, disable, enable) \
{\
offset, \
FIELD_PREP_CONST(mask, disable) | (mask << BIT_WRITEABLE_SHIFT), \
FIELD_PREP_CONST(mask, enable) | (mask << BIT_WRITEABLE_SHIFT), \
}
#define RK_UDPHY_GEN_GRF_REG(offset, bitend, bitstart, disable, enable) \
_RK_UDPHY_GEN_GRF_REG(offset, GENMASK(bitend, bitstart), disable, enable)
struct rk_udphy_grf_cfg {
/* u2phy-grf */
struct rk_udphy_grf_reg bvalid_phy_con;
struct rk_udphy_grf_reg bvalid_grf_con;
/* usb-grf */
struct rk_udphy_grf_reg usb3otg0_cfg;
struct rk_udphy_grf_reg usb3otg1_cfg;
/* usbdpphy-grf */
struct rk_udphy_grf_reg low_pwrn;
struct rk_udphy_grf_reg rx_lfps;
};
struct rk_udphy_vogrf_cfg {
/* vo-grf */
struct rk_udphy_grf_reg hpd_trigger;
u32 dp_lane_reg;
};
struct rk_udphy_dp_tx_drv_ctrl {
u32 trsv_reg0204;
u32 trsv_reg0205;
u32 trsv_reg0206;
u32 trsv_reg0207;
};
struct rk_udphy_cfg {
unsigned int num_phys;
unsigned int phy_ids[2];
/* resets to be requested */
const char * const *rst_list;
int num_rsts;
struct rk_udphy_grf_cfg grfcfg;
struct rk_udphy_vogrf_cfg vogrfcfg[2];
const struct rk_udphy_dp_tx_drv_ctrl (*dp_tx_ctrl_cfg[4])[4];
const struct rk_udphy_dp_tx_drv_ctrl (*dp_tx_ctrl_cfg_typec[4])[4];
};
struct rk_udphy {
struct device *dev;
struct regmap *pma_regmap;
struct regmap *u2phygrf;
struct regmap *udphygrf;
struct regmap *usbgrf;
struct regmap *vogrf;
struct typec_switch_dev *sw;
struct typec_mux_dev *mux;
struct mutex mutex; /* mutex to protect access to individual PHYs */
/* clocks and rests */
int num_clks;
struct clk_bulk_data *clks;
struct clk *refclk;
int num_rsts;
struct reset_control_bulk_data *rsts;
/* PHY status management */
bool flip;
bool mode_change;
u8 mode;
u8 status;
/* utilized for USB */
bool hs; /* flag for high-speed */
/* utilized for DP */
struct gpio_desc *sbu1_dc_gpio;
struct gpio_desc *sbu2_dc_gpio;
u32 lane_mux_sel[4];
u32 dp_lane_sel[4];
u32 dp_aux_dout_sel;
u32 dp_aux_din_sel;
Annotation
- Immediate include surface: `dt-bindings/phy/phy.h`, `linux/bitfield.h`, `linux/bits.h`, `linux/clk.h`, `linux/delay.h`, `linux/gpio.h`, `linux/mfd/syscon.h`, `linux/mod_devicetable.h`.
- Detected declarations: `struct rk_udphy_grf_reg`, `struct rk_udphy_grf_cfg`, `struct rk_udphy_vogrf_cfg`, `struct rk_udphy_dp_tx_drv_ctrl`, `struct rk_udphy_cfg`, `struct rk_udphy`, `function rk_udphy_grfreg_write`, `function rk_udphy_clk_init`, `function rk_udphy_reset_assert_all`, `function rk_udphy_reset_deassert_all`.
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.