drivers/phy/socionext/phy-uniphier-pcie.c
Source file repositories/reference/linux-study-clean/drivers/phy/socionext/phy-uniphier-pcie.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/socionext/phy-uniphier-pcie.c- Extension
.c- Size
- 9062 bytes
- Lines
- 350
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/bitfield.hlinux/clk.hlinux/iopoll.hlinux/mfd/syscon.hlinux/module.hlinux/of.hlinux/phy/phy.hlinux/platform_device.hlinux/regmap.hlinux/reset.hlinux/resource.h
Detected Declarations
struct uniphier_pciephy_privstruct uniphier_pciephy_soc_datafunction uniphier_pciephy_testio_writefunction uniphier_pciephy_testio_readfunction uniphier_pciephy_set_paramfunction uniphier_pciephy_assertfunction uniphier_pciephy_deassertfunction uniphier_pciephy_initfunction uniphier_pciephy_exitfunction uniphier_pciephy_probefunction uniphier_pciephy_ld20_setmodefunction uniphier_pciephy_nx1_setmode
Annotated Snippet
struct uniphier_pciephy_priv {
void __iomem *base;
struct device *dev;
struct clk *clk, *clk_gio;
struct reset_control *rst, *rst_gio;
const struct uniphier_pciephy_soc_data *data;
};
struct uniphier_pciephy_soc_data {
bool is_legacy;
bool is_dual_phy;
void (*set_phymode)(struct regmap *regmap);
};
static void uniphier_pciephy_testio_write(struct uniphier_pciephy_priv *priv,
int id, u32 data)
{
if (id)
data <<= TESTIO_PHY_SHIFT;
/* need to read TESTO twice after accessing TESTI */
writel(data, priv->base + PCL_PHY_TEST_I);
readl(priv->base + PCL_PHY_TEST_O);
readl(priv->base + PCL_PHY_TEST_O);
}
static u32 uniphier_pciephy_testio_read(struct uniphier_pciephy_priv *priv, int id)
{
u32 val = readl(priv->base + PCL_PHY_TEST_O);
if (id)
val >>= TESTIO_PHY_SHIFT;
return val & TESTO_DAT_MASK;
}
static void uniphier_pciephy_set_param(struct uniphier_pciephy_priv *priv,
int id, u32 reg, u32 mask, u32 param)
{
u32 val;
/* read previous data */
val = FIELD_PREP(TESTI_DAT_MASK, 1);
val |= FIELD_PREP(TESTI_ADR_MASK, reg);
uniphier_pciephy_testio_write(priv, id, val);
val = uniphier_pciephy_testio_read(priv, id);
/* update value */
val &= ~mask;
val |= mask & param;
val = FIELD_PREP(TESTI_DAT_MASK, val);
val |= FIELD_PREP(TESTI_ADR_MASK, reg);
uniphier_pciephy_testio_write(priv, id, val);
uniphier_pciephy_testio_write(priv, id, val | TESTI_WR_EN);
uniphier_pciephy_testio_write(priv, id, val);
/* read current data as dummy */
val = FIELD_PREP(TESTI_DAT_MASK, 1);
val |= FIELD_PREP(TESTI_ADR_MASK, reg);
uniphier_pciephy_testio_write(priv, id, val);
uniphier_pciephy_testio_read(priv, id);
}
static void uniphier_pciephy_assert(struct uniphier_pciephy_priv *priv)
{
u32 val;
val = readl(priv->base + PCL_PHY_RESET);
val &= ~PCL_PHY_RESET_N;
val |= PCL_PHY_RESET_N_MNMODE;
writel(val, priv->base + PCL_PHY_RESET);
}
static void uniphier_pciephy_deassert(struct uniphier_pciephy_priv *priv)
{
u32 val;
val = readl(priv->base + PCL_PHY_RESET);
val |= PCL_PHY_RESET_N_MNMODE | PCL_PHY_RESET_N;
writel(val, priv->base + PCL_PHY_RESET);
}
static int uniphier_pciephy_init(struct phy *phy)
{
struct uniphier_pciephy_priv *priv = phy_get_drvdata(phy);
u32 val;
int ret, id;
ret = clk_prepare_enable(priv->clk);
if (ret)
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/bitfield.h`, `linux/clk.h`, `linux/iopoll.h`, `linux/mfd/syscon.h`, `linux/module.h`, `linux/of.h`, `linux/phy/phy.h`.
- Detected declarations: `struct uniphier_pciephy_priv`, `struct uniphier_pciephy_soc_data`, `function uniphier_pciephy_testio_write`, `function uniphier_pciephy_testio_read`, `function uniphier_pciephy_set_param`, `function uniphier_pciephy_assert`, `function uniphier_pciephy_deassert`, `function uniphier_pciephy_init`, `function uniphier_pciephy_exit`, `function uniphier_pciephy_probe`.
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.