drivers/phy/st/phy-stm32-usbphyc.c
Source file repositories/reference/linux-study-clean/drivers/phy/st/phy-stm32-usbphyc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/phy/st/phy-stm32-usbphyc.c- Extension
.c- Size
- 21039 bytes
- Lines
- 827
- Domain
- Driver Families
- Bucket
- drivers/phy
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/delay.hlinux/iopoll.hlinux/kernel.hlinux/module.hlinux/of.hlinux/phy/phy.hlinux/platform_device.hlinux/reset.hlinux/units.h
Detected Declarations
struct pll_paramsstruct stm32_usbphyc_phystruct stm32_usbphycenum boosting_valsenum dc_level_valsenum current_trimenum impedance_trimenum squelch_levelenum rx_offsetfunction stm32_usbphyc_set_bitsfunction stm32_usbphyc_clr_bitsfunction stm32_usbphyc_regulators_enablefunction stm32_usbphyc_regulators_disablefunction stm32_usbphyc_get_pll_paramsfunction stm32_usbphyc_pll_initfunction __stm32_usbphyc_pll_disablefunction stm32_usbphyc_pll_disablefunction stm32_usbphyc_pll_enablefunction stm32_usbphyc_phy_initfunction stm32_usbphyc_phy_exitfunction stm32_usbphyc_phy_power_onfunction stm32_usbphyc_phy_power_offfunction stm32_usbphyc_clk48_preparefunction stm32_usbphyc_clk48_unpreparefunction stm32_usbphyc_clk48_recalc_ratefunction stm32_usbphyc_clk48_unregisterfunction stm32_usbphyc_clk48_registerfunction stm32_usbphyc_phy_tuningfunction stm32_usbphyc_switch_setupfunction stm32_usbphyc_probefunction pulsefunction for_each_child_of_nodefunction stm32_usbphyc_removefunction stm32_usbphyc_resume
Annotated Snippet
struct pll_params {
u8 ndiv;
u16 frac;
};
struct stm32_usbphyc_phy {
struct phy *phy;
struct stm32_usbphyc *usbphyc;
struct regulator *vbus;
u32 index;
bool active;
u32 tune;
};
struct stm32_usbphyc {
struct device *dev;
void __iomem *base;
struct clk *clk;
struct reset_control *rst;
struct stm32_usbphyc_phy **phys;
int nphys;
struct regulator *vdda1v1;
struct regulator *vdda1v8;
atomic_t n_pll_cons;
struct clk_hw clk48_hw;
int switch_setup;
};
static inline void stm32_usbphyc_set_bits(void __iomem *reg, u32 bits)
{
writel_relaxed(readl_relaxed(reg) | bits, reg);
}
static inline void stm32_usbphyc_clr_bits(void __iomem *reg, u32 bits)
{
writel_relaxed(readl_relaxed(reg) & ~bits, reg);
}
static int stm32_usbphyc_regulators_enable(struct stm32_usbphyc *usbphyc)
{
int ret;
ret = regulator_enable(usbphyc->vdda1v1);
if (ret)
return ret;
ret = regulator_enable(usbphyc->vdda1v8);
if (ret)
goto vdda1v1_disable;
return 0;
vdda1v1_disable:
regulator_disable(usbphyc->vdda1v1);
return ret;
}
static int stm32_usbphyc_regulators_disable(struct stm32_usbphyc *usbphyc)
{
int ret;
ret = regulator_disable(usbphyc->vdda1v8);
if (ret)
return ret;
ret = regulator_disable(usbphyc->vdda1v1);
if (ret)
return ret;
return 0;
}
static void stm32_usbphyc_get_pll_params(u32 clk_rate,
struct pll_params *pll_params)
{
unsigned long long fvco, ndiv, frac;
/* _
* | FVCO = INFF*2*(NDIV + FRACT/2^16) when DITHER_DISABLE[1] = 1
* | FVCO = 2880MHz
* <
* | NDIV = integer part of input bits to set the LDF
* |_FRACT = fractional part of input bits to set the LDF
* => PLLNDIV = integer part of (FVCO / (INFF*2))
* => PLLFRACIN = fractional part of(FVCO / INFF*2) * 2^16
* <=> PLLFRACIN = ((FVCO / (INFF*2)) - PLLNDIV) * 2^16
*/
fvco = (unsigned long long)PLL_FVCO_MHZ * HZ_PER_MHZ;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/delay.h`, `linux/iopoll.h`, `linux/kernel.h`, `linux/module.h`, `linux/of.h`.
- Detected declarations: `struct pll_params`, `struct stm32_usbphyc_phy`, `struct stm32_usbphyc`, `enum boosting_vals`, `enum dc_level_vals`, `enum current_trim`, `enum impedance_trim`, `enum squelch_level`, `enum rx_offset`, `function stm32_usbphyc_set_bits`.
- Atlas domain: Driver Families / drivers/phy.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.