drivers/pinctrl/airoha/pinctrl-airoha.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/airoha/pinctrl-airoha.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/airoha/pinctrl-airoha.c- Extension
.c- Size
- 106455 bytes
- Lines
- 3105
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dt-bindings/pinctrl/mt65xx.hlinux/bitfield.hlinux/bits.hlinux/cleanup.hlinux/gpio/driver.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/irqdomain.hlinux/mfd/syscon.hlinux/of.hlinux/of_irq.hlinux/of_platform.hlinux/pinctrl/consumer.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinconf-generic.hlinux/pinctrl/pinmux.hlinux/platform_device.hlinux/regmap.h../core.h../pinconf.h../pinmux.h
Detected Declarations
struct airoha_pinctrl_regstruct airoha_pinctrl_func_groupstruct airoha_pinctrl_funcstruct airoha_pinctrl_confstruct airoha_pinctrl_gpiochipstruct airoha_pinctrl_confs_infostruct airoha_pinctrlstruct airoha_pinctrl_match_dataenum airoha_pinctrl_mux_funcenum airoha_pinctrl_confs_typefunction airoha_convert_pin_to_reg_offsetfunction airoha_gpio_setfunction airoha_gpio_getfunction airoha_gpio_direction_outputfunction airoha_irq_unmaskfunction airoha_irq_maskfunction airoha_irq_typefunction airoha_irq_handlerfunction for_each_set_bitfunction airoha_pinctrl_add_gpiochipfunction airoha_pinmux_set_muxfunction airoha_pinmux_set_directionfunction airoha_pinctrl_get_conf_regfunction airoha_pinctrl_get_conffunction airoha_pinctrl_set_conffunction airoha_pinconf_get_directionfunction airoha_pinconf_getfunction airoha_pinconf_set_pin_valuefunction airoha_pinconf_setfunction airoha_pinconf_group_getfunction airoha_pinconf_group_setfunction airoha_pinctrl_probe
Annotated Snippet
struct airoha_pinctrl_reg {
u32 offset;
u32 mask;
};
enum airoha_pinctrl_mux_func {
AIROHA_FUNC_MUX,
AIROHA_FUNC_PWM_MUX,
AIROHA_FUNC_PWM_EXT_MUX,
};
struct airoha_pinctrl_func_group {
const char *name;
struct {
enum airoha_pinctrl_mux_func mux;
u32 offset;
u32 mask;
u32 val;
} regmap[2];
int regmap_size;
};
struct airoha_pinctrl_func {
const struct pinfunction desc;
const struct airoha_pinctrl_func_group *groups;
u8 group_size;
};
struct airoha_pinctrl_conf {
u32 pin;
struct airoha_pinctrl_reg reg;
};
struct airoha_pinctrl_gpiochip {
struct gpio_chip chip;
/* gpio */
const u32 *data;
const u32 *dir;
const u32 *out;
/* irq */
const u32 *status;
const u32 *level;
const u32 *edge;
u32 irq_type[AIROHA_NUM_PINS];
};
struct airoha_pinctrl_confs_info {
const struct airoha_pinctrl_conf *confs;
unsigned int num_confs;
};
enum airoha_pinctrl_confs_type {
AIROHA_PINCTRL_CONFS_PULLUP,
AIROHA_PINCTRL_CONFS_PULLDOWN,
AIROHA_PINCTRL_CONFS_DRIVE_E2,
AIROHA_PINCTRL_CONFS_DRIVE_E4,
AIROHA_PINCTRL_CONFS_PCIE_RST_OD,
AIROHA_PINCTRL_CONFS_MAX,
};
struct airoha_pinctrl {
struct pinctrl_dev *ctrl;
struct pinctrl_desc desc;
const struct pingroup *grps;
const struct airoha_pinctrl_func *funcs;
const struct airoha_pinctrl_confs_info *confs_info;
struct regmap *chip_scu;
struct regmap *regmap;
struct airoha_pinctrl_gpiochip gpiochip;
};
struct airoha_pinctrl_match_data {
const struct pinctrl_pin_desc *pins;
const unsigned int num_pins;
const struct pingroup *grps;
const unsigned int num_grps;
const struct airoha_pinctrl_func *funcs;
const unsigned int num_funcs;
const struct airoha_pinctrl_confs_info confs_info[AIROHA_PINCTRL_CONFS_MAX];
};
static struct pinctrl_pin_desc en7581_pinctrl_pins[] = {
PINCTRL_PIN(0, "uart1_txd"),
PINCTRL_PIN(1, "uart1_rxd"),
Annotation
- Immediate include surface: `dt-bindings/pinctrl/mt65xx.h`, `linux/bitfield.h`, `linux/bits.h`, `linux/cleanup.h`, `linux/gpio/driver.h`, `linux/interrupt.h`, `linux/io.h`, `linux/irq.h`.
- Detected declarations: `struct airoha_pinctrl_reg`, `struct airoha_pinctrl_func_group`, `struct airoha_pinctrl_func`, `struct airoha_pinctrl_conf`, `struct airoha_pinctrl_gpiochip`, `struct airoha_pinctrl_confs_info`, `struct airoha_pinctrl`, `struct airoha_pinctrl_match_data`, `enum airoha_pinctrl_mux_func`, `enum airoha_pinctrl_confs_type`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.