drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c
Extension
.c
Size
40756 bytes
Lines
1757
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct aspeed_g7_soc1_pinctrl {
	struct device *dev;
	struct regmap *regmap;
	struct pinctrl_dev *pctl;
};

struct aspeed_g7_field {
	unsigned int reg;
	unsigned int shift;
	unsigned int mask;
};

static struct aspeed_g7_field
aspeed_g7_soc1_pinmux_field_from_pin(unsigned int pin)
{
	return (struct aspeed_g7_field){
		.reg = ASPEED_G7_SOC1_MUX_BASE +
		       (pin / ASPEED_G7_SOC1_MUX_PINS_PER_REG) *
			       ASPEED_G7_SOC1_REG_STRIDE,
		.shift = (pin % ASPEED_G7_SOC1_MUX_PINS_PER_REG) *
			 ASPEED_G7_SOC1_MUX_BITS_PER_PIN,
		.mask = ASPEED_G7_SOC1_MUX_FUNC_MASK,
	};
}

static struct aspeed_g7_field
aspeed_g7_soc1_bias_field_from_pin(unsigned int pin)
{
	return (struct aspeed_g7_field){
		.reg = ASPEED_G7_SOC1_BIAS_BASE +
		       (pin / ASPEED_G7_SOC1_BIAS_PINS_PER_REG) *
			       ASPEED_G7_SOC1_REG_STRIDE,
		.shift = pin % ASPEED_G7_SOC1_BIAS_PINS_PER_REG,
		.mask = ASPEED_G7_SOC1_BIAS_FUNC_MASK,
	};
}

static struct aspeed_g7_field
aspeed_g7_soc1_drv_field_from_idx(unsigned int idx)
{
	return (struct aspeed_g7_field){
		.reg = ASPEED_G7_SOC1_DRV_BASE +
		       (idx / ASPEED_G7_SOC1_DRV_PINS_PER_REG) *
			       ASPEED_G7_SOC1_REG_STRIDE,
		.shift = (idx % ASPEED_G7_SOC1_DRV_PINS_PER_REG) *
			 ASPEED_G7_SOC1_DRV_BITS_PER_PIN,
		.mask = ASPEED_G7_SOC1_DRV_FUNC_MASK,
	};
}

#define PIN(n) PINCTRL_PIN(n, #n)

static const struct pinctrl_pin_desc aspeed_g7_soc1_pins[] = {
	PIN(C16),
	PIN(C14),
	PIN(C11),
	PIN(D9),
	PIN(F14),
	PIN(D10),
	PIN(C12),
	PIN(C13),
	PIN(AC26),
	PIN(AA25),
	PIN(AB23),
	PIN(U22),
	PIN(V21),
	PIN(N26),
	PIN(P25),
	PIN(N25),
	PIN(V23),
	PIN(W22),
	PIN(AB26),
	PIN(AD26),
	PIN(P26),
	PIN(AE26),
	PIN(AF26),
	PIN(AF25),
	PIN(AE25),
	PIN(AD25),
	PIN(AF23),
	PIN(AF20),
	PIN(AF21),
	PIN(AE21),
	PIN(AE23),
	PIN(AD22),
	PIN(AF17),
	PIN(AA16),
	PIN(Y16),
	PIN(V17),
	PIN(J13),

Annotation

Implementation Notes