drivers/pinctrl/bcm/pinctrl-bcm63268.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/bcm/pinctrl-bcm63268.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/bcm/pinctrl-bcm63268.c
Extension
.c
Size
16187 bytes
Lines
631
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct bcm63268_function {
	const char *name;
	const char * const *groups;
	const unsigned num_groups;

	enum bcm63268_pinctrl_reg reg;
	uint32_t mask;
};

#define BCM63268_PIN(a, b, basemode)			\
	{						\
		.number = a,				\
		.name = b,				\
		.drv_data = (void *)(basemode)		\
	}

static const struct pinctrl_pin_desc bcm63268_pins[] = {
	PINCTRL_PIN(0, "gpio0"),
	PINCTRL_PIN(1, "gpio1"),
	BCM63268_PIN(2, "gpio2", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(3, "gpio3", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(4, "gpio4", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(5, "gpio5", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(6, "gpio6", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(7, "gpio7", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(8, "gpio8", BCM63268_BASEMODE_DECTPD),
	BCM63268_PIN(9, "gpio9", BCM63268_BASEMODE_DECTPD),
	BCM63268_PIN(10, "gpio10", BCM63268_BASEMODE_VDSL_PHY_0),
	BCM63268_PIN(11, "gpio11", BCM63268_BASEMODE_VDSL_PHY_0),
	BCM63268_PIN(12, "gpio12", BCM63268_BASEMODE_VDSL_PHY_1),
	BCM63268_PIN(13, "gpio13", BCM63268_BASEMODE_VDSL_PHY_1),
	PINCTRL_PIN(14, "gpio14"),
	PINCTRL_PIN(15, "gpio15"),
	PINCTRL_PIN(16, "gpio16"),
	PINCTRL_PIN(17, "gpio17"),
	PINCTRL_PIN(18, "gpio18"),
	PINCTRL_PIN(19, "gpio19"),
	PINCTRL_PIN(20, "gpio20"),
	PINCTRL_PIN(21, "gpio21"),
	PINCTRL_PIN(22, "gpio22"),
	PINCTRL_PIN(23, "gpio23"),
	BCM63268_PIN(24, "gpio24",
		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_2),
	BCM63268_PIN(25, "gpio25",
		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_2),
	BCM63268_PIN(26, "gpio26",
		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_3),
	BCM63268_PIN(27, "gpio27",
		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_3),
	BCM63268_PIN(28, "gpio28", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(29, "gpio29", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(30, "gpio30", BCM63268_BASEMODE_NAND),
	BCM63268_PIN(31, "gpio31", BCM63268_BASEMODE_NAND),
	PINCTRL_PIN(32, "gpio32"),
	PINCTRL_PIN(33, "gpio33"),
	PINCTRL_PIN(34, "gpio34"),
	PINCTRL_PIN(35, "gpio35"),
	PINCTRL_PIN(36, "gpio36"),
	PINCTRL_PIN(37, "gpio37"),
	PINCTRL_PIN(38, "gpio38"),
	PINCTRL_PIN(39, "gpio39"),
	PINCTRL_PIN(40, "gpio40"),
	PINCTRL_PIN(41, "gpio41"),
	PINCTRL_PIN(42, "gpio42"),
	PINCTRL_PIN(43, "gpio43"),
	PINCTRL_PIN(44, "gpio44"),
	PINCTRL_PIN(45, "gpio45"),
	PINCTRL_PIN(46, "gpio46"),
	PINCTRL_PIN(47, "gpio47"),
	PINCTRL_PIN(48, "gpio48"),
	PINCTRL_PIN(49, "gpio49"),
	PINCTRL_PIN(50, "gpio50"),
	PINCTRL_PIN(51, "gpio51"),
};

static unsigned gpio0_pins[] = { 0 };
static unsigned gpio1_pins[] = { 1 };
static unsigned gpio2_pins[] = { 2 };
static unsigned gpio3_pins[] = { 3 };
static unsigned gpio4_pins[] = { 4 };
static unsigned gpio5_pins[] = { 5 };
static unsigned gpio6_pins[] = { 6 };
static unsigned gpio7_pins[] = { 7 };
static unsigned gpio8_pins[] = { 8 };
static unsigned gpio9_pins[] = { 9 };
static unsigned gpio10_pins[] = { 10 };
static unsigned gpio11_pins[] = { 11 };
static unsigned gpio12_pins[] = { 12 };
static unsigned gpio13_pins[] = { 13 };
static unsigned gpio14_pins[] = { 14 };

Annotation

Implementation Notes