drivers/pinctrl/freescale/pinctrl-imx1.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx1.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/freescale/pinctrl-imx1.c- Extension
.c- Size
- 9134 bytes
- Lines
- 269
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/of.hlinux/platform_device.hlinux/pinctrl/pinctrl.hpinctrl-imx1.h
Detected Declarations
enum imx1_padsfunction imx1_pinctrl_probe
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
//
// i.MX1 pinctrl driver based on imx pinmux core
//
// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-imx1.h"
#define PAD_ID(port, pin) ((port) * 32 + (pin))
#define IMX1_PA 0
#define IMX1_PB 1
#define IMX1_PC 2
#define IMX1_PD 3
enum imx1_pads {
MX1_PAD_A24 = PAD_ID(IMX1_PA, 0),
MX1_PAD_TIN = PAD_ID(IMX1_PA, 1),
MX1_PAD_PWMO = PAD_ID(IMX1_PA, 2),
MX1_PAD_CSI_MCLK = PAD_ID(IMX1_PA, 3),
MX1_PAD_CSI_D0 = PAD_ID(IMX1_PA, 4),
MX1_PAD_CSI_D1 = PAD_ID(IMX1_PA, 5),
MX1_PAD_CSI_D2 = PAD_ID(IMX1_PA, 6),
MX1_PAD_CSI_D3 = PAD_ID(IMX1_PA, 7),
MX1_PAD_CSI_D4 = PAD_ID(IMX1_PA, 8),
MX1_PAD_CSI_D5 = PAD_ID(IMX1_PA, 9),
MX1_PAD_CSI_D6 = PAD_ID(IMX1_PA, 10),
MX1_PAD_CSI_D7 = PAD_ID(IMX1_PA, 11),
MX1_PAD_CSI_VSYNC = PAD_ID(IMX1_PA, 12),
MX1_PAD_CSI_HSYNC = PAD_ID(IMX1_PA, 13),
MX1_PAD_CSI_PIXCLK = PAD_ID(IMX1_PA, 14),
MX1_PAD_I2C_SDA = PAD_ID(IMX1_PA, 15),
MX1_PAD_I2C_SCL = PAD_ID(IMX1_PA, 16),
MX1_PAD_DTACK = PAD_ID(IMX1_PA, 17),
MX1_PAD_BCLK = PAD_ID(IMX1_PA, 18),
MX1_PAD_LBA = PAD_ID(IMX1_PA, 19),
MX1_PAD_ECB = PAD_ID(IMX1_PA, 20),
MX1_PAD_A0 = PAD_ID(IMX1_PA, 21),
MX1_PAD_CS4 = PAD_ID(IMX1_PA, 22),
MX1_PAD_CS5 = PAD_ID(IMX1_PA, 23),
MX1_PAD_A16 = PAD_ID(IMX1_PA, 24),
MX1_PAD_A17 = PAD_ID(IMX1_PA, 25),
MX1_PAD_A18 = PAD_ID(IMX1_PA, 26),
MX1_PAD_A19 = PAD_ID(IMX1_PA, 27),
MX1_PAD_A20 = PAD_ID(IMX1_PA, 28),
MX1_PAD_A21 = PAD_ID(IMX1_PA, 29),
MX1_PAD_A22 = PAD_ID(IMX1_PA, 30),
MX1_PAD_A23 = PAD_ID(IMX1_PA, 31),
MX1_PAD_SD_DAT0 = PAD_ID(IMX1_PB, 8),
MX1_PAD_SD_DAT1 = PAD_ID(IMX1_PB, 9),
MX1_PAD_SD_DAT2 = PAD_ID(IMX1_PB, 10),
MX1_PAD_SD_DAT3 = PAD_ID(IMX1_PB, 11),
MX1_PAD_SD_SCLK = PAD_ID(IMX1_PB, 12),
MX1_PAD_SD_CMD = PAD_ID(IMX1_PB, 13),
MX1_PAD_SIM_SVEN = PAD_ID(IMX1_PB, 14),
MX1_PAD_SIM_PD = PAD_ID(IMX1_PB, 15),
MX1_PAD_SIM_TX = PAD_ID(IMX1_PB, 16),
MX1_PAD_SIM_RX = PAD_ID(IMX1_PB, 17),
MX1_PAD_SIM_RST = PAD_ID(IMX1_PB, 18),
MX1_PAD_SIM_CLK = PAD_ID(IMX1_PB, 19),
MX1_PAD_USBD_AFE = PAD_ID(IMX1_PB, 20),
MX1_PAD_USBD_OE = PAD_ID(IMX1_PB, 21),
MX1_PAD_USBD_RCV = PAD_ID(IMX1_PB, 22),
MX1_PAD_USBD_SUSPND = PAD_ID(IMX1_PB, 23),
MX1_PAD_USBD_VP = PAD_ID(IMX1_PB, 24),
MX1_PAD_USBD_VM = PAD_ID(IMX1_PB, 25),
MX1_PAD_USBD_VPO = PAD_ID(IMX1_PB, 26),
MX1_PAD_USBD_VMO = PAD_ID(IMX1_PB, 27),
MX1_PAD_UART2_CTS = PAD_ID(IMX1_PB, 28),
MX1_PAD_UART2_RTS = PAD_ID(IMX1_PB, 29),
MX1_PAD_UART2_TXD = PAD_ID(IMX1_PB, 30),
MX1_PAD_UART2_RXD = PAD_ID(IMX1_PB, 31),
MX1_PAD_SSI_RXFS = PAD_ID(IMX1_PC, 3),
MX1_PAD_SSI_RXCLK = PAD_ID(IMX1_PC, 4),
MX1_PAD_SSI_RXDAT = PAD_ID(IMX1_PC, 5),
MX1_PAD_SSI_TXDAT = PAD_ID(IMX1_PC, 6),
MX1_PAD_SSI_TXFS = PAD_ID(IMX1_PC, 7),
MX1_PAD_SSI_TXCLK = PAD_ID(IMX1_PC, 8),
MX1_PAD_UART1_CTS = PAD_ID(IMX1_PC, 9),
MX1_PAD_UART1_RTS = PAD_ID(IMX1_PC, 10),
MX1_PAD_UART1_TXD = PAD_ID(IMX1_PC, 11),
MX1_PAD_UART1_RXD = PAD_ID(IMX1_PC, 12),
MX1_PAD_SPI1_RDY = PAD_ID(IMX1_PC, 13),
MX1_PAD_SPI1_SCLK = PAD_ID(IMX1_PC, 14),
MX1_PAD_SPI1_SS = PAD_ID(IMX1_PC, 15),
MX1_PAD_SPI1_MISO = PAD_ID(IMX1_PC, 16),
Annotation
- Immediate include surface: `linux/init.h`, `linux/of.h`, `linux/platform_device.h`, `linux/pinctrl/pinctrl.h`, `pinctrl-imx1.h`.
- Detected declarations: `enum imx1_pads`, `function imx1_pinctrl_probe`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.