drivers/pinctrl/freescale/pinctrl-imx35.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx35.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/freescale/pinctrl-imx35.c
Extension
.c
Size
30997 bytes
Lines
1027
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// imx35 pinctrl driver.
//
// This driver was mostly copied from the imx51 pinctrl driver which has:
//
// Copyright (C) 2012 Freescale Semiconductor, Inc.
// Copyright (C) 2012 Linaro, Inc.
//
// Author: Dong Aisheng <dong.aisheng@linaro.org>

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-imx.h"

enum imx35_pads {
	MX35_PAD_RESERVE0 = 0,
	MX35_PAD_CAPTURE = 1,
	MX35_PAD_COMPARE = 2,
	MX35_PAD_WDOG_RST = 3,
	MX35_PAD_GPIO1_0 = 4,
	MX35_PAD_GPIO1_1 = 5,
	MX35_PAD_GPIO2_0 = 6,
	MX35_PAD_GPIO3_0 = 7,
	MX35_PAD_CLKO = 8,
	MX35_PAD_VSTBY = 9,
	MX35_PAD_A0 = 10,
	MX35_PAD_A1 = 11,
	MX35_PAD_A2 = 12,
	MX35_PAD_A3 = 13,
	MX35_PAD_A4 = 14,
	MX35_PAD_A5 = 15,
	MX35_PAD_A6 = 16,
	MX35_PAD_A7 = 17,
	MX35_PAD_A8 = 18,
	MX35_PAD_A9 = 19,
	MX35_PAD_A10 = 20,
	MX35_PAD_MA10 = 21,
	MX35_PAD_A11 = 22,
	MX35_PAD_A12 = 23,
	MX35_PAD_A13 = 24,
	MX35_PAD_A14 = 25,
	MX35_PAD_A15 = 26,
	MX35_PAD_A16 = 27,
	MX35_PAD_A17 = 28,
	MX35_PAD_A18 = 29,
	MX35_PAD_A19 = 30,
	MX35_PAD_A20 = 31,
	MX35_PAD_A21 = 32,
	MX35_PAD_A22 = 33,
	MX35_PAD_A23 = 34,
	MX35_PAD_A24 = 35,
	MX35_PAD_A25 = 36,
	MX35_PAD_EB0 = 37,
	MX35_PAD_EB1 = 38,
	MX35_PAD_OE = 39,
	MX35_PAD_CS0 = 40,
	MX35_PAD_CS1 = 41,
	MX35_PAD_CS2 = 42,
	MX35_PAD_CS3 = 43,
	MX35_PAD_CS4 = 44,
	MX35_PAD_CS5 = 45,
	MX35_PAD_NF_CE0 = 46,
	MX35_PAD_LBA = 47,
	MX35_PAD_BCLK = 48,
	MX35_PAD_RW = 49,
	MX35_PAD_NFWE_B = 50,
	MX35_PAD_NFRE_B = 51,
	MX35_PAD_NFALE = 52,
	MX35_PAD_NFCLE = 53,
	MX35_PAD_NFWP_B = 54,
	MX35_PAD_NFRB = 55,
	MX35_PAD_CSI_D8 = 56,
	MX35_PAD_CSI_D9 = 57,
	MX35_PAD_CSI_D10 = 58,
	MX35_PAD_CSI_D11 = 59,
	MX35_PAD_CSI_D12 = 60,
	MX35_PAD_CSI_D13 = 61,
	MX35_PAD_CSI_D14 = 62,
	MX35_PAD_CSI_D15 = 63,
	MX35_PAD_CSI_MCLK = 64,
	MX35_PAD_CSI_VSYNC = 65,
	MX35_PAD_CSI_HSYNC = 66,
	MX35_PAD_CSI_PIXCLK = 67,
	MX35_PAD_I2C1_CLK = 68,

Annotation

Implementation Notes