drivers/pinctrl/freescale/pinctrl-imx6sl.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx6sl.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/freescale/pinctrl-imx6sl.c
Extension
.c
Size
12376 bytes
Lines
392
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// Freescale imx6sl pinctrl driver
//
// Author: Shawn Guo <shawn.guo@linaro.org>
// Copyright (C) 2013 Freescale Semiconductor, Inc.

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-imx.h"

enum imx6sl_pads {
	MX6SL_PAD_RESERVE0 = 0,
	MX6SL_PAD_RESERVE1 = 1,
	MX6SL_PAD_RESERVE2 = 2,
	MX6SL_PAD_RESERVE3 = 3,
	MX6SL_PAD_RESERVE4 = 4,
	MX6SL_PAD_RESERVE5 = 5,
	MX6SL_PAD_RESERVE6 = 6,
	MX6SL_PAD_RESERVE7 = 7,
	MX6SL_PAD_RESERVE8 = 8,
	MX6SL_PAD_RESERVE9 = 9,
	MX6SL_PAD_RESERVE10 = 10,
	MX6SL_PAD_RESERVE11 = 11,
	MX6SL_PAD_RESERVE12 = 12,
	MX6SL_PAD_RESERVE13 = 13,
	MX6SL_PAD_RESERVE14 = 14,
	MX6SL_PAD_RESERVE15 = 15,
	MX6SL_PAD_RESERVE16 = 16,
	MX6SL_PAD_RESERVE17 = 17,
	MX6SL_PAD_RESERVE18 = 18,
	MX6SL_PAD_AUD_MCLK = 19,
	MX6SL_PAD_AUD_RXC = 20,
	MX6SL_PAD_AUD_RXD = 21,
	MX6SL_PAD_AUD_RXFS = 22,
	MX6SL_PAD_AUD_TXC = 23,
	MX6SL_PAD_AUD_TXD = 24,
	MX6SL_PAD_AUD_TXFS = 25,
	MX6SL_PAD_ECSPI1_MISO = 26,
	MX6SL_PAD_ECSPI1_MOSI = 27,
	MX6SL_PAD_ECSPI1_SCLK = 28,
	MX6SL_PAD_ECSPI1_SS0 = 29,
	MX6SL_PAD_ECSPI2_MISO = 30,
	MX6SL_PAD_ECSPI2_MOSI = 31,
	MX6SL_PAD_ECSPI2_SCLK = 32,
	MX6SL_PAD_ECSPI2_SS0 = 33,
	MX6SL_PAD_EPDC_BDR0 = 34,
	MX6SL_PAD_EPDC_BDR1 = 35,
	MX6SL_PAD_EPDC_D0 = 36,
	MX6SL_PAD_EPDC_D1 = 37,
	MX6SL_PAD_EPDC_D10 = 38,
	MX6SL_PAD_EPDC_D11 = 39,
	MX6SL_PAD_EPDC_D12 = 40,
	MX6SL_PAD_EPDC_D13 = 41,
	MX6SL_PAD_EPDC_D14 = 42,
	MX6SL_PAD_EPDC_D15 = 43,
	MX6SL_PAD_EPDC_D2 = 44,
	MX6SL_PAD_EPDC_D3 = 45,
	MX6SL_PAD_EPDC_D4 = 46,
	MX6SL_PAD_EPDC_D5 = 47,
	MX6SL_PAD_EPDC_D6 = 48,
	MX6SL_PAD_EPDC_D7 = 49,
	MX6SL_PAD_EPDC_D8 = 50,
	MX6SL_PAD_EPDC_D9 = 51,
	MX6SL_PAD_EPDC_GDCLK = 52,
	MX6SL_PAD_EPDC_GDOE = 53,
	MX6SL_PAD_EPDC_GDRL = 54,
	MX6SL_PAD_EPDC_GDSP = 55,
	MX6SL_PAD_EPDC_PWRCOM = 56,
	MX6SL_PAD_EPDC_PWRCTRL0 = 57,
	MX6SL_PAD_EPDC_PWRCTRL1 = 58,
	MX6SL_PAD_EPDC_PWRCTRL2 = 59,
	MX6SL_PAD_EPDC_PWRCTRL3 = 60,
	MX6SL_PAD_EPDC_PWRINT = 61,
	MX6SL_PAD_EPDC_PWRSTAT = 62,
	MX6SL_PAD_EPDC_PWRWAKEUP = 63,
	MX6SL_PAD_EPDC_SDCE0 = 64,
	MX6SL_PAD_EPDC_SDCE1 = 65,
	MX6SL_PAD_EPDC_SDCE2 = 66,
	MX6SL_PAD_EPDC_SDCE3 = 67,
	MX6SL_PAD_EPDC_SDCLK = 68,
	MX6SL_PAD_EPDC_SDLE = 69,
	MX6SL_PAD_EPDC_SDOE = 70,
	MX6SL_PAD_EPDC_SDSHR = 71,
	MX6SL_PAD_EPDC_VCOM0 = 72,

Annotation

Implementation Notes