drivers/pinctrl/freescale/pinctrl-imx6sll.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx6sll.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/freescale/pinctrl-imx6sll.c
Extension
.c
Size
11906 bytes
Lines
359
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2016 Freescale Semiconductor, Inc.
// Copyright 2017-2018 NXP.

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-imx.h"

enum imx6sll_pads {
	MX6SLL_PAD_RESERVE0 = 0,
	MX6SLL_PAD_RESERVE1 = 1,
	MX6SLL_PAD_RESERVE2 = 2,
	MX6SLL_PAD_RESERVE3 = 3,
	MX6SLL_PAD_RESERVE4 = 4,
	MX6SLL_PAD_WDOG_B = 5,
	MX6SLL_PAD_REF_CLK_24M = 6,
	MX6SLL_PAD_REF_CLK_32K = 7,
	MX6SLL_PAD_PWM1 = 8,
	MX6SLL_PAD_KEY_COL0 = 9,
	MX6SLL_PAD_KEY_ROW0 = 10,
	MX6SLL_PAD_KEY_COL1 = 11,
	MX6SLL_PAD_KEY_ROW1 = 12,
	MX6SLL_PAD_KEY_COL2 = 13,
	MX6SLL_PAD_KEY_ROW2 = 14,
	MX6SLL_PAD_KEY_COL3 = 15,
	MX6SLL_PAD_KEY_ROW3 = 16,
	MX6SLL_PAD_KEY_COL4 = 17,
	MX6SLL_PAD_KEY_ROW4 = 18,
	MX6SLL_PAD_KEY_COL5 = 19,
	MX6SLL_PAD_KEY_ROW5 = 20,
	MX6SLL_PAD_KEY_COL6 = 21,
	MX6SLL_PAD_KEY_ROW6 = 22,
	MX6SLL_PAD_KEY_COL7 = 23,
	MX6SLL_PAD_KEY_ROW7 = 24,
	MX6SLL_PAD_EPDC_DATA00 = 25,
	MX6SLL_PAD_EPDC_DATA01 = 26,
	MX6SLL_PAD_EPDC_DATA02 = 27,
	MX6SLL_PAD_EPDC_DATA03 = 28,
	MX6SLL_PAD_EPDC_DATA04 = 29,
	MX6SLL_PAD_EPDC_DATA05 = 30,
	MX6SLL_PAD_EPDC_DATA06 = 31,
	MX6SLL_PAD_EPDC_DATA07 = 32,
	MX6SLL_PAD_EPDC_DATA08 = 33,
	MX6SLL_PAD_EPDC_DATA09 = 34,
	MX6SLL_PAD_EPDC_DATA10 = 35,
	MX6SLL_PAD_EPDC_DATA11 = 36,
	MX6SLL_PAD_EPDC_DATA12 = 37,
	MX6SLL_PAD_EPDC_DATA13 = 38,
	MX6SLL_PAD_EPDC_DATA14 = 39,
	MX6SLL_PAD_EPDC_DATA15 = 40,
	MX6SLL_PAD_EPDC_SDCLK = 41,
	MX6SLL_PAD_EPDC_SDLE = 42,
	MX6SLL_PAD_EPDC_SDOE = 43,
	MX6SLL_PAD_EPDC_SDSHR = 44,
	MX6SLL_PAD_EPDC_SDCE0 = 45,
	MX6SLL_PAD_EPDC_SDCE1 = 46,
	MX6SLL_PAD_EPDC_SDCE2 = 47,
	MX6SLL_PAD_EPDC_SDCE3 = 48,
	MX6SLL_PAD_EPDC_GDCLK = 49,
	MX6SLL_PAD_EPDC_GDOE = 50,
	MX6SLL_PAD_EPDC_GDRL = 51,
	MX6SLL_PAD_EPDC_GDSP = 52,
	MX6SLL_PAD_EPDC_VCOM0 = 53,
	MX6SLL_PAD_EPDC_VCOM1 = 54,
	MX6SLL_PAD_EPDC_BDR0 = 55,
	MX6SLL_PAD_EPDC_BDR1 = 56,
	MX6SLL_PAD_EPDC_PWR_CTRL0 = 57,
	MX6SLL_PAD_EPDC_PWR_CTRL1 = 58,
	MX6SLL_PAD_EPDC_PWR_CTRL2 = 59,
	MX6SLL_PAD_EPDC_PWR_CTRL3 = 60,
	MX6SLL_PAD_EPDC_PWR_COM = 61,
	MX6SLL_PAD_EPDC_PWR_INT = 62,
	MX6SLL_PAD_EPDC_PWR_STAT = 63,
	MX6SLL_PAD_EPDC_PWR_WAKE = 64,
	MX6SLL_PAD_LCD_CLK = 65,
	MX6SLL_PAD_LCD_ENABLE = 66,
	MX6SLL_PAD_LCD_HSYNC = 67,
	MX6SLL_PAD_LCD_VSYNC = 68,
	MX6SLL_PAD_LCD_RESET = 69,
	MX6SLL_PAD_LCD_DATA00 = 70,
	MX6SLL_PAD_LCD_DATA01 = 71,
	MX6SLL_PAD_LCD_DATA02 = 72,
	MX6SLL_PAD_LCD_DATA03 = 73,

Annotation

Implementation Notes