drivers/pinctrl/freescale/pinctrl-imx8dxl.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx8dxl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/freescale/pinctrl-imx8dxl.c- Extension
.c- Size
- 7323 bytes
- Lines
- 202
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dt-bindings/pinctrl/pads-imx8dxl.hlinux/err.hlinux/firmware/imx/sci.hlinux/init.hlinux/io.hlinux/mod_devicetable.hlinux/module.hlinux/pinctrl/pinctrl.hlinux/platform_device.hpinctrl-imx.h
Detected Declarations
function imx8dxl_pinctrl_probefunction imx8dxl_pinctrl_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2019~2020 NXP
*/
#include <dt-bindings/pinctrl/pads-imx8dxl.h>
#include <linux/err.h>
#include <linux/firmware/imx/sci.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include "pinctrl-imx.h"
static const struct pinctrl_pin_desc imx8dxl_pinctrl_pads[] = {
IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_PERST_B),
IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_CLKREQ_B),
IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_WAKE_B),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC0),
IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC1),
IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC2),
IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC3),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_3V3_USB3IO),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_CLK),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_CMD),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA0),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA1),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA2),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA3),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA4),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA5),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA6),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA7),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_STROBE),
IMX_PINCTRL_PIN(IMX8DXL_EMMC0_RESET_B),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_SD1FIX0),
IMX_PINCTRL_PIN(IMX8DXL_USDHC1_RESET_B),
IMX_PINCTRL_PIN(IMX8DXL_USDHC1_VSELECT),
IMX_PINCTRL_PIN(IMX8DXL_CTL_NAND_RE_P_N),
IMX_PINCTRL_PIN(IMX8DXL_USDHC1_WP),
IMX_PINCTRL_PIN(IMX8DXL_USDHC1_CD_B),
IMX_PINCTRL_PIN(IMX8DXL_CTL_NAND_DQS_P_N),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXC),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TX_CTL),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD0),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD1),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD2),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD3),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXC),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RX_CTL),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD0),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD1),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD2),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD3),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_REFCLK_125M_25M),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_MDIO),
IMX_PINCTRL_PIN(IMX8DXL_ENET0_MDC),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXC),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD2),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TX_CTL),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD3),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXC),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD3),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD2),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD1),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD0),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD1),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD0),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RX_CTL),
IMX_PINCTRL_PIN(IMX8DXL_ENET1_REFCLK_125M_25M),
IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
IMX_PINCTRL_PIN(IMX8DXL_SPI3_SCK),
IMX_PINCTRL_PIN(IMX8DXL_SPI3_SDO),
IMX_PINCTRL_PIN(IMX8DXL_SPI3_SDI),
IMX_PINCTRL_PIN(IMX8DXL_SPI3_CS0),
IMX_PINCTRL_PIN(IMX8DXL_SPI3_CS1),
IMX_PINCTRL_PIN(IMX8DXL_MCLK_IN1),
IMX_PINCTRL_PIN(IMX8DXL_MCLK_IN0),
IMX_PINCTRL_PIN(IMX8DXL_MCLK_OUT0),
IMX_PINCTRL_PIN(IMX8DXL_UART1_TX),
IMX_PINCTRL_PIN(IMX8DXL_UART1_RX),
IMX_PINCTRL_PIN(IMX8DXL_UART1_RTS_B),
Annotation
- Immediate include surface: `dt-bindings/pinctrl/pads-imx8dxl.h`, `linux/err.h`, `linux/firmware/imx/sci.h`, `linux/init.h`, `linux/io.h`, `linux/mod_devicetable.h`, `linux/module.h`, `linux/pinctrl/pinctrl.h`.
- Detected declarations: `function imx8dxl_pinctrl_probe`, `function imx8dxl_pinctrl_init`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.