drivers/pinctrl/freescale/pinctrl-imx8qm.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx8qm.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/freescale/pinctrl-imx8qm.c
Extension
.c
Size
12568 bytes
Lines
335
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 * Copyright 2017~2018 NXP
 *	Dong Aisheng <aisheng.dong@nxp.com>
 */

#include <dt-bindings/pinctrl/pads-imx8qm.h>
#include <linux/err.h>
#include <linux/firmware/imx/sci.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>

#include "pinctrl-imx.h"

static const struct pinctrl_pin_desc imx8qm_pinctrl_pads[] = {
	IMX_PINCTRL_PIN(IMX8QM_SIM0_CLK),
	IMX_PINCTRL_PIN(IMX8QM_SIM0_RST),
	IMX_PINCTRL_PIN(IMX8QM_SIM0_IO),
	IMX_PINCTRL_PIN(IMX8QM_SIM0_PD),
	IMX_PINCTRL_PIN(IMX8QM_SIM0_POWER_EN),
	IMX_PINCTRL_PIN(IMX8QM_SIM0_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM),
	IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_01),
	IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_01),
	IMX_PINCTRL_PIN(IMX8QM_GPT0_CLK),
	IMX_PINCTRL_PIN(IMX8QM_GPT0_CAPTURE),
	IMX_PINCTRL_PIN(IMX8QM_GPT0_COMPARE),
	IMX_PINCTRL_PIN(IMX8QM_GPT1_CLK),
	IMX_PINCTRL_PIN(IMX8QM_GPT1_CAPTURE),
	IMX_PINCTRL_PIN(IMX8QM_GPT1_COMPARE),
	IMX_PINCTRL_PIN(IMX8QM_UART0_RX),
	IMX_PINCTRL_PIN(IMX8QM_UART0_TX),
	IMX_PINCTRL_PIN(IMX8QM_UART0_RTS_B),
	IMX_PINCTRL_PIN(IMX8QM_UART0_CTS_B),
	IMX_PINCTRL_PIN(IMX8QM_UART1_TX),
	IMX_PINCTRL_PIN(IMX8QM_UART1_RX),
	IMX_PINCTRL_PIN(IMX8QM_UART1_RTS_B),
	IMX_PINCTRL_PIN(IMX8QM_UART1_CTS_B),
	IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
	IMX_PINCTRL_PIN(IMX8QM_SCU_PMIC_MEMC_ON),
	IMX_PINCTRL_PIN(IMX8QM_SCU_WDOG_OUT),
	IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SDA),
	IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SCL),
	IMX_PINCTRL_PIN(IMX8QM_PMIC_EARLY_WARNING),
	IMX_PINCTRL_PIN(IMX8QM_PMIC_INT_B),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_01),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_02),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_03),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_04),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_05),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_06),
	IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_07),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE0),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE1),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE2),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE3),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE4),
	IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE5),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO00),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO01),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SCL),
	IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SDA),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO00),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO01),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SCL),
	IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SDA),
	IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_01),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SCL),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SDA),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_00),
	IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_01),

Annotation

Implementation Notes