drivers/pinctrl/freescale/pinctrl-imx8qxp.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/freescale/pinctrl-imx8qxp.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/freescale/pinctrl-imx8qxp.c
Extension
.c
Size
8893 bytes
Lines
242
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 * Copyright 2017-2018 NXP
 *	Dong Aisheng <aisheng.dong@nxp.com>
 */

#include <dt-bindings/pinctrl/pads-imx8qxp.h>
#include <linux/err.h>
#include <linux/firmware/imx/sci.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>

#include "pinctrl-imx.h"

static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
	IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_PERST_B),
	IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_CLKREQ_B),
	IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_WAKE_B),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
	IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC0),
	IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC1),
	IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC2),
	IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC3),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_3V3_USB3IO),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CLK),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CMD),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA0),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA1),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA2),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA3),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX0),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA4),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA5),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA6),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA7),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_STROBE),
	IMX_PINCTRL_PIN(IMX8QXP_EMMC0_RESET_B),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX1),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_RESET_B),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_VSELECT),
	IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_RE_P_N),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_WP),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CD_B),
	IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_DQS_P_N),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CLK),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CMD),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA0),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA1),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA2),
	IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA3),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSEL3),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXC),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TX_CTL),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD0),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD1),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD2),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD3),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXC),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RX_CTL),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD0),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD1),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD2),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD3),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_REFCLK_125M_25M),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDIO),
	IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDC),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FSR),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FST),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKR),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKT),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX0),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX1),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX2_RX3),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX3_RX2),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX4_RX1),
	IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX5_RX0),
	IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_RX),
	IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_TX),
	IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_EXT_CLK),
	IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB),

Annotation

Implementation Notes