drivers/pinctrl/intel/Kconfig
Source file repositories/reference/linux-study-clean/drivers/pinctrl/intel/Kconfig
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/intel/Kconfig- Extension
[no extension]- Size
- 5655 bytes
- Lines
- 176
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: build/configuration rule
- Status
- atlas-only
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0
# Intel pin control drivers
menu "Intel pinctrl drivers"
depends on (ACPI && X86) || COMPILE_TEST
config PINCTRL_BAYTRAIL
bool "Intel Baytrail GPIO pin control"
select PINCTRL_INTEL
help
driver for memory mapped GPIO functionality on Intel Baytrail
platforms. Supports 3 banks with 102, 28 and 44 gpios.
Most pins are usually muxed to some other functionality by firmware,
so only a small amount is available for gpio use.
Requires ACPI device enumeration code to set up a platform device.
config PINCTRL_CHERRYVIEW
tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
select PINCTRL_INTEL
help
Cherryview/Braswell pinctrl driver provides an interface that
allows configuring of SoC pins and using them as GPIOs.
config PINCTRL_LYNXPOINT
tristate "Intel Lynxpoint pinctrl and GPIO driver"
select PINCTRL_INTEL
help
Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
provides an interface that allows configuring of PCH pins and
using them as GPIOs.
config PINCTRL_INTEL
tristate
select PINMUX
select PINCONF
select GENERIC_PINCONF
select GPIOLIB
select GPIOLIB_IRQCHIP
config PINCTRL_INTEL_PLATFORM
tristate "Intel pinctrl and GPIO platform driver"
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
of Intel PCH pins and using them as GPIOs. Currently the following
Intel SoCs / platforms require this to be functional:
- Lunar Lake
- Nova Lake
- Panther Lake
config PINCTRL_ALDERLAKE
tristate "Intel Alder Lake pinctrl and GPIO driver"
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
PCH pins of the following platforms and using them as GPIOs:
- Alder Lake HX, N, and S
- Raptor Lake HX, E, and S
- Twin Lake
config PINCTRL_BROXTON
tristate "Intel Broxton pinctrl and GPIO driver"
select PINCTRL_INTEL
help
Broxton pinctrl driver provides an interface that allows
configuring of SoC pins and using them as GPIOs.
config PINCTRL_CANNONLAKE
tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
select PINCTRL_INTEL
Annotation
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.