drivers/pinctrl/intel/pinctrl-emmitsburg.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/intel/pinctrl-emmitsburg.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/intel/pinctrl-emmitsburg.c
Extension
.c
Size
11623 bytes
Lines
369
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Intel Emmitsburg PCH pinctrl/GPIO driver
 *
 * Copyright (C) 2020 Intel Corporation
 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
 */

#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm.h>

#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-intel.h"

#define EBG_PAD_OWN	0x0a0
#define EBG_PADCFGLOCK	0x100
#define EBG_HOSTSW_OWN	0x130
#define EBG_GPI_IS	0x200
#define EBG_GPI_IE	0x210

#define EBG_COMMUNITY(b, s, e, g)			\
	INTEL_COMMUNITY_GPPS(b, s, e, g, EBG)

/* Emmitsburg */
static const struct pinctrl_pin_desc ebg_pins[] = {
	/* GPP_A */
	PINCTRL_PIN(0, "ESPI_ALERT0B"),
	PINCTRL_PIN(1, "ESPI_ALERT1B"),
	PINCTRL_PIN(2, "ESPI_IO_0"),
	PINCTRL_PIN(3, "ESPI_IO_1"),
	PINCTRL_PIN(4, "ESPI_IO_2"),
	PINCTRL_PIN(5, "ESPI_IO_3"),
	PINCTRL_PIN(6, "ESPI_CS0B"),
	PINCTRL_PIN(7, "ESPI_CS1B"),
	PINCTRL_PIN(8, "ESPI_RESETB"),
	PINCTRL_PIN(9, "ESPI_CLK"),
	PINCTRL_PIN(10, "SRCCLKREQB_0"),
	PINCTRL_PIN(11, "SRCCLKREQB_1"),
	PINCTRL_PIN(12, "SRCCLKREQB_2"),
	PINCTRL_PIN(13, "SRCCLKREQB_3"),
	PINCTRL_PIN(14, "SRCCLKREQB_4"),
	PINCTRL_PIN(15, "SRCCLKREQB_5"),
	PINCTRL_PIN(16, "SRCCLKREQB_6"),
	PINCTRL_PIN(17, "SRCCLKREQB_7"),
	PINCTRL_PIN(18, "SRCCLKREQB_8"),
	PINCTRL_PIN(19, "SRCCLKREQB_9"),
	PINCTRL_PIN(20, "ESPI_CLK_LOOPBK"),
	/* GPP_B */
	PINCTRL_PIN(21, "GSXDOUT"),
	PINCTRL_PIN(22, "GSXSLOAD"),
	PINCTRL_PIN(23, "GSXDIN"),
	PINCTRL_PIN(24, "GSXSRESETB"),
	PINCTRL_PIN(25, "GSXCLK"),
	PINCTRL_PIN(26, "USB2_OCB_0"),
	PINCTRL_PIN(27, "USB2_OCB_1"),
	PINCTRL_PIN(28, "USB2_OCB_2"),
	PINCTRL_PIN(29, "USB2_OCB_3"),
	PINCTRL_PIN(30, "USB2_OCB_4"),
	PINCTRL_PIN(31, "USB2_OCB_5"),
	PINCTRL_PIN(32, "USB2_OCB_6"),
	PINCTRL_PIN(33, "HS_UART0_RXD"),
	PINCTRL_PIN(34, "HS_UART0_TXD"),
	PINCTRL_PIN(35, "HS_UART0_RTSB"),
	PINCTRL_PIN(36, "HS_UART0_CTSB"),
	PINCTRL_PIN(37, "HS_UART1_RXD"),
	PINCTRL_PIN(38, "HS_UART1_TXD"),
	PINCTRL_PIN(39, "HS_UART1_RTSB"),
	PINCTRL_PIN(40, "HS_UART1_CTSB"),
	PINCTRL_PIN(41, "GPPC_B_20"),
	PINCTRL_PIN(42, "GPPC_B_21"),
	PINCTRL_PIN(43, "GPPC_B_22"),
	PINCTRL_PIN(44, "PS_ONB"),
	/* SPI */
	PINCTRL_PIN(45, "SPI0_IO_2"),
	PINCTRL_PIN(46, "SPI0_IO_3"),
	PINCTRL_PIN(47, "SPI0_MOSI_IO_0"),
	PINCTRL_PIN(48, "SPI0_MISO_IO_1"),
	PINCTRL_PIN(49, "SPI0_TPM_CSB"),
	PINCTRL_PIN(50, "SPI0_FLASH_0_CSB"),
	PINCTRL_PIN(51, "SPI0_FLASH_1_CSB"),
	PINCTRL_PIN(52, "SPI0_CLK"),
	PINCTRL_PIN(53, "TIME_SYNC_0"),
	PINCTRL_PIN(54, "SPKR"),
	PINCTRL_PIN(55, "CPU_GP_0"),
	PINCTRL_PIN(56, "CPU_GP_1"),
	PINCTRL_PIN(57, "CPU_GP_2"),
	PINCTRL_PIN(58, "CPU_GP_3"),

Annotation

Implementation Notes