drivers/pinctrl/mediatek/pinctrl-mt2701.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mt2701.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/mediatek/pinctrl-mt2701.c
Extension
.c
Size
19508 bytes
Lines
545
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mtk_spec_pinmux_set {
	unsigned short pin;
	unsigned short offset;
	unsigned char bit;
};

#define MTK_PINMUX_SPEC(_pin, _offset, _bit)	\
	{					\
		.pin = _pin,			\
		.offset = _offset,		\
		.bit = _bit,			\
	}

static const struct mtk_drv_group_desc mt2701_drv_grp[] =  {
	/* 0E4E8SR 4/8/12/16 */
	MTK_DRV_GRP(4, 16, 1, 2, 4),
	/* 0E2E4SR  2/4/6/8 */
	MTK_DRV_GRP(2, 8, 1, 2, 2),
	/* E8E4E2  2/4/6/8/10/12/14/16 */
	MTK_DRV_GRP(2, 16, 0, 2, 2)
};

static const struct mtk_pin_drv_grp mt2701_pin_drv[] = {
	MTK_PIN_DRV_GRP(0, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(1, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(2, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(3, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(4, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(5, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(6, 0xf50, 0, 1),
	MTK_PIN_DRV_GRP(7, 0xf50, 4, 1),
	MTK_PIN_DRV_GRP(8, 0xf50, 4, 1),
	MTK_PIN_DRV_GRP(9, 0xf50, 4, 1),
	MTK_PIN_DRV_GRP(10, 0xf50, 8, 1),
	MTK_PIN_DRV_GRP(11, 0xf50, 8, 1),
	MTK_PIN_DRV_GRP(12, 0xf50, 8, 1),
	MTK_PIN_DRV_GRP(13, 0xf50, 8, 1),
	MTK_PIN_DRV_GRP(14, 0xf50, 12, 0),
	MTK_PIN_DRV_GRP(15, 0xf50, 12, 0),
	MTK_PIN_DRV_GRP(16, 0xf60, 0, 0),
	MTK_PIN_DRV_GRP(17, 0xf60, 0, 0),
	MTK_PIN_DRV_GRP(18, 0xf60, 4, 0),
	MTK_PIN_DRV_GRP(19, 0xf60, 4, 0),
	MTK_PIN_DRV_GRP(20, 0xf60, 4, 0),
	MTK_PIN_DRV_GRP(21, 0xf60, 4, 0),
	MTK_PIN_DRV_GRP(22, 0xf60, 8, 0),
	MTK_PIN_DRV_GRP(23, 0xf60, 8, 0),
	MTK_PIN_DRV_GRP(24, 0xf60, 8, 0),
	MTK_PIN_DRV_GRP(25, 0xf60, 8, 0),
	MTK_PIN_DRV_GRP(26, 0xf60, 8, 0),
	MTK_PIN_DRV_GRP(27, 0xf60, 12, 0),
	MTK_PIN_DRV_GRP(28, 0xf60, 12, 0),
	MTK_PIN_DRV_GRP(29, 0xf60, 12, 0),
	MTK_PIN_DRV_GRP(30, 0xf60, 0, 0),
	MTK_PIN_DRV_GRP(31, 0xf60, 0, 0),
	MTK_PIN_DRV_GRP(32, 0xf60, 0, 0),
	MTK_PIN_DRV_GRP(33, 0xf70, 0, 0),
	MTK_PIN_DRV_GRP(34, 0xf70, 0, 0),
	MTK_PIN_DRV_GRP(35, 0xf70, 0, 0),
	MTK_PIN_DRV_GRP(36, 0xf70, 0, 0),
	MTK_PIN_DRV_GRP(37, 0xf70, 0, 0),
	MTK_PIN_DRV_GRP(38, 0xf70, 4, 0),
	MTK_PIN_DRV_GRP(39, 0xf70, 8, 1),
	MTK_PIN_DRV_GRP(40, 0xf70, 8, 1),
	MTK_PIN_DRV_GRP(41, 0xf70, 8, 1),
	MTK_PIN_DRV_GRP(42, 0xf70, 8, 1),
	MTK_PIN_DRV_GRP(43, 0xf70, 12, 0),
	MTK_PIN_DRV_GRP(44, 0xf70, 12, 0),
	MTK_PIN_DRV_GRP(45, 0xf70, 12, 0),
	MTK_PIN_DRV_GRP(47, 0xf80, 0, 0),
	MTK_PIN_DRV_GRP(48, 0xf80, 0, 0),
	MTK_PIN_DRV_GRP(49, 0xf80, 4, 0),
	MTK_PIN_DRV_GRP(50, 0xf70, 4, 0),
	MTK_PIN_DRV_GRP(51, 0xf70, 4, 0),
	MTK_PIN_DRV_GRP(52, 0xf70, 4, 0),
	MTK_PIN_DRV_GRP(53, 0xf80, 12, 0),
	MTK_PIN_DRV_GRP(54, 0xf80, 12, 0),
	MTK_PIN_DRV_GRP(55, 0xf80, 12, 0),
	MTK_PIN_DRV_GRP(56, 0xf80, 12, 0),
	MTK_PIN_DRV_GRP(60, 0xf90, 8, 1),
	MTK_PIN_DRV_GRP(61, 0xf90, 8, 1),
	MTK_PIN_DRV_GRP(62, 0xf90, 8, 1),
	MTK_PIN_DRV_GRP(63, 0xf90, 12, 1),
	MTK_PIN_DRV_GRP(64, 0xf90, 12, 1),
	MTK_PIN_DRV_GRP(65, 0xf90, 12, 1),
	MTK_PIN_DRV_GRP(66, 0xfa0, 0, 1),
	MTK_PIN_DRV_GRP(67, 0xfa0, 0, 1),
	MTK_PIN_DRV_GRP(68, 0xfa0, 0, 1),
	MTK_PIN_DRV_GRP(69, 0xfa0, 0, 1),
	MTK_PIN_DRV_GRP(70, 0xfa0, 0, 1),

Annotation

Implementation Notes