drivers/pinctrl/mediatek/pinctrl-mt6878.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mt6878.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/mediatek/pinctrl-mt6878.c- Extension
.c- Size
- 67089 bytes
- Lines
- 1479
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hpinctrl-mtk-mt6878.hpinctrl-paris.h
Detected Declarations
function mt6878_pinctrl_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 MediaTek Inc.
* Author: Light Hsieh <light.hsieh@mediatek.com>
*
* Copyright (C) 2025 Igor Belwon <igor.belwon@mentallysanemainliners.org>
*/
#include <linux/module.h>
#include "pinctrl-mtk-mt6878.h"
#include "pinctrl-paris.h"
/* MT6878 have multiple bases to program pin configuration listed as the below:
* GPIO_BASE: 0x10005000
* IOCFG_BL_BASE: 0x11D10000
* IOCFG_BM_BASE: 0x11D30000
* IOCFG_BR_BASE: 0x11D40000
* IOCFG_BL1_BASE: 0x11D50000
* IOCFG_BR1_BASE: 0x11D60000
* IOCFG_LM_BASE: 0x11E20000
* IOCFG_LT_BASE: 0x11E30000
* IOCFG_RM_BASE: 0x11EB0000
* IOCFG_RT_BASE: 0x11EC0000
* _i_based could be used to indicate what base the pin should be mapped into.
*/
#define PIN_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \
32, 0)
#define PINS_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \
32, 1)
static const struct mtk_pin_field_calc mt6878_pin_mode_range[] = {
PIN_FIELD(0, 195, 0x300, 0x10, 0, 4),
};
static const struct mtk_pin_field_calc mt6878_pin_dir_range[] = {
PIN_FIELD(0, 195, 0x0, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6878_pin_di_range[] = {
PIN_FIELD(0, 195, 0x200, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6878_pin_do_range[] = {
PIN_FIELD(0, 195, 0x100, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6878_pin_ies_range[] = {
PIN_FIELD_BASE(0, 0, 3, 0x0070, 0x10, 9, 1),
PIN_FIELD_BASE(1, 1, 3, 0x0070, 0x10, 10, 1),
PIN_FIELD_BASE(2, 2, 3, 0x0070, 0x10, 11, 1),
PIN_FIELD_BASE(3, 3, 3, 0x0070, 0x10, 12, 1),
PIN_FIELD_BASE(4, 4, 3, 0x0070, 0x10, 13, 1),
PIN_FIELD_BASE(5, 5, 3, 0x0070, 0x10, 14, 1),
PIN_FIELD_BASE(6, 6, 4, 0x0050, 0x10, 13, 1),
PIN_FIELD_BASE(7, 7, 4, 0x0050, 0x10, 14, 1),
PIN_FIELD_BASE(8, 8, 4, 0x0050, 0x10, 15, 1),
PIN_FIELD_BASE(9, 9, 4, 0x0050, 0x10, 16, 1),
PIN_FIELD_BASE(10, 10, 4, 0x0050, 0x10, 10, 1),
PIN_FIELD_BASE(11, 11, 4, 0x0050, 0x10, 11, 1),
PIN_FIELD_BASE(12, 12, 4, 0x0050, 0x10, 12, 1),
PIN_FIELD_BASE(13, 13, 6, 0x0070, 0x10, 4, 1),
PIN_FIELD_BASE(14, 14, 6, 0x0070, 0x10, 5, 1),
PIN_FIELD_BASE(15, 15, 6, 0x0070, 0x10, 6, 1),
PIN_FIELD_BASE(16, 16, 6, 0x0070, 0x10, 7, 1),
PIN_FIELD_BASE(17, 17, 6, 0x0070, 0x10, 8, 1),
PIN_FIELD_BASE(18, 18, 6, 0x0070, 0x10, 9, 1),
PIN_FIELD_BASE(19, 19, 3, 0x0070, 0x10, 0, 1),
PIN_FIELD_BASE(20, 20, 3, 0x0070, 0x10, 1, 1),
PIN_FIELD_BASE(21, 21, 3, 0x0070, 0x10, 2, 1),
PIN_FIELD_BASE(22, 22, 3, 0x0070, 0x10, 3, 1),
PIN_FIELD_BASE(23, 23, 3, 0x0070, 0x10, 4, 1),
PIN_FIELD_BASE(24, 24, 5, 0x0040, 0x10, 1, 1),
PIN_FIELD_BASE(25, 25, 3, 0x0070, 0x10, 5, 1),
PIN_FIELD_BASE(26, 26, 3, 0x0070, 0x10, 6, 1),
PIN_FIELD_BASE(27, 27, 3, 0x0070, 0x10, 7, 1),
PIN_FIELD_BASE(28, 28, 3, 0x0070, 0x10, 8, 1),
PIN_FIELD_BASE(29, 29, 6, 0x0070, 0x10, 10, 1),
PIN_FIELD_BASE(30, 30, 6, 0x0070, 0x10, 12, 1),
PIN_FIELD_BASE(31, 31, 6, 0x0070, 0x10, 13, 1),
PIN_FIELD_BASE(32, 32, 6, 0x0070, 0x10, 11, 1),
PIN_FIELD_BASE(33, 33, 9, 0x0050, 0x10, 0, 1),
PIN_FIELD_BASE(34, 34, 9, 0x0050, 0x10, 1, 1),
PIN_FIELD_BASE(35, 35, 9, 0x0050, 0x10, 2, 1),
PIN_FIELD_BASE(36, 36, 8, 0x0090, 0x10, 0, 1),
PIN_FIELD_BASE(37, 37, 8, 0x0090, 0x10, 1, 1),
PIN_FIELD_BASE(38, 38, 8, 0x0090, 0x10, 2, 1),
Annotation
- Immediate include surface: `linux/module.h`, `pinctrl-mtk-mt6878.h`, `pinctrl-paris.h`.
- Detected declarations: `function mt6878_pinctrl_init`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.