drivers/pinctrl/mediatek/pinctrl-mt7621.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mt7621.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/mediatek/pinctrl-mt7621.c- Extension
.c- Size
- 4129 bytes
- Lines
- 118
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/platform_device.hlinux/of.hpinctrl-mtmips.h
Detected Declarations
function mt7621_pinctrl_probefunction mt7621_pinctrl_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include "pinctrl-mtmips.h"
#define MT7621_GPIO_MODE_UART1 1
#define MT7621_GPIO_MODE_I2C 2
#define MT7621_GPIO_MODE_UART3_MASK 0x3
#define MT7621_GPIO_MODE_UART3_SHIFT 3
#define MT7621_GPIO_MODE_UART3_GPIO 1
#define MT7621_GPIO_MODE_UART2_MASK 0x3
#define MT7621_GPIO_MODE_UART2_SHIFT 5
#define MT7621_GPIO_MODE_UART2_GPIO 1
#define MT7621_GPIO_MODE_JTAG 7
#define MT7621_GPIO_MODE_WDT_MASK 0x3
#define MT7621_GPIO_MODE_WDT_SHIFT 8
#define MT7621_GPIO_MODE_WDT_GPIO 1
#define MT7621_GPIO_MODE_PCIE_RST 0
#define MT7621_GPIO_MODE_PCIE_REF 2
#define MT7621_GPIO_MODE_PCIE_MASK 0x3
#define MT7621_GPIO_MODE_PCIE_SHIFT 10
#define MT7621_GPIO_MODE_PCIE_GPIO 1
#define MT7621_GPIO_MODE_MDIO_MASK 0x3
#define MT7621_GPIO_MODE_MDIO_SHIFT 12
#define MT7621_GPIO_MODE_MDIO_GPIO 1
#define MT7621_GPIO_MODE_RGMII1 14
#define MT7621_GPIO_MODE_RGMII2 15
#define MT7621_GPIO_MODE_SPI_MASK 0x3
#define MT7621_GPIO_MODE_SPI_SHIFT 16
#define MT7621_GPIO_MODE_SPI_GPIO 1
#define MT7621_GPIO_MODE_SDHCI_MASK 0x3
#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
#define MT7621_GPIO_MODE_SDHCI_GPIO 1
static struct mtmips_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
static struct mtmips_pmx_func uart3_grp[] = {
FUNC("uart3", 0, 5, 4),
FUNC("i2s", 2, 5, 4),
FUNC("spdif3", 3, 5, 4),
};
static struct mtmips_pmx_func uart2_grp[] = {
FUNC("uart2", 0, 9, 4),
FUNC("pcm", 2, 9, 4),
FUNC("spdif2", 3, 9, 4),
};
static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
static struct mtmips_pmx_func wdt_grp[] = {
FUNC("wdt rst", 0, 18, 1),
FUNC("wdt refclk", 2, 18, 1),
};
static struct mtmips_pmx_func pcie_rst_grp[] = {
FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
};
static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
static struct mtmips_pmx_func spi_grp[] = {
FUNC("spi", 0, 34, 7),
FUNC("nand1", 2, 34, 7),
};
static struct mtmips_pmx_func sdhci_grp[] = {
FUNC("sdhci", 0, 41, 8),
FUNC("nand2", 2, 41, 8),
};
static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
static struct mtmips_pmx_group mt7621_pinmux_data[] = {
GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1),
GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C),
GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK,
MT7621_GPIO_MODE_UART3_GPIO, MT7621_GPIO_MODE_UART3_SHIFT),
GRP_G("uart2", uart2_grp, MT7621_GPIO_MODE_UART2_MASK,
MT7621_GPIO_MODE_UART2_GPIO, MT7621_GPIO_MODE_UART2_SHIFT),
GRP("jtag", jtag_grp, 1, MT7621_GPIO_MODE_JTAG),
GRP_G("wdt", wdt_grp, MT7621_GPIO_MODE_WDT_MASK,
MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT),
GRP_G("pcie", pcie_rst_grp, MT7621_GPIO_MODE_PCIE_MASK,
MT7621_GPIO_MODE_PCIE_GPIO, MT7621_GPIO_MODE_PCIE_SHIFT),
GRP_G("mdio", mdio_grp, MT7621_GPIO_MODE_MDIO_MASK,
MT7621_GPIO_MODE_MDIO_GPIO, MT7621_GPIO_MODE_MDIO_SHIFT),
GRP("rgmii2", rgmii2_grp, 1, MT7621_GPIO_MODE_RGMII2),
GRP_G("spi", spi_grp, MT7621_GPIO_MODE_SPI_MASK,
MT7621_GPIO_MODE_SPI_GPIO, MT7621_GPIO_MODE_SPI_SHIFT),
GRP_G("sdhci", sdhci_grp, MT7621_GPIO_MODE_SDHCI_MASK,
MT7621_GPIO_MODE_SDHCI_GPIO, MT7621_GPIO_MODE_SDHCI_SHIFT),
GRP("rgmii1", rgmii1_grp, 1, MT7621_GPIO_MODE_RGMII1),
{ 0 }
Annotation
- Immediate include surface: `linux/module.h`, `linux/platform_device.h`, `linux/of.h`, `pinctrl-mtmips.h`.
- Detected declarations: `function mt7621_pinctrl_probe`, `function mt7621_pinctrl_init`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.