drivers/pinctrl/mediatek/pinctrl-mt8183.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mt8183.c

File Facts

System: Linux kernel
Corpus path: drivers/pinctrl/mediatek/pinctrl-mt8183.c
Extension: .c
Size: 26205 bytes
Lines: 589
Domain: Driver Families
Bucket: drivers/pinctrl
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

pinctrl-mtk-mt8183.h
pinctrl-paris.h

Detected Declarations

function mt8183_pinctrl_init

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 MediaTek Inc.
 *
 * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
 *
 */

#include "pinctrl-mtk-mt8183.h"
#include "pinctrl-paris.h"

/* MT8183 have multiple bases to program pin configuration listed as the below:
 * iocfg[0]:0x10005000, iocfg[1]:0x11F20000, iocfg[2]:0x11E80000,
 * iocfg[3]:0x11E70000, iocfg[4]:0x11E90000, iocfg[5]:0x11D30000,
 * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000.
 * _i_based could be used to indicate what base the pin should be mapped into.
 */

#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		       _x_bits, 32, 0)

#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		      _x_bits, 32, 1)

static const struct mtk_pin_field_calc mt8183_pin_mode_range[] = {
	PIN_FIELD(0, 192, 0x300, 0x10, 0, 4),
};

static const struct mtk_pin_field_calc mt8183_pin_dir_range[] = {
	PIN_FIELD(0, 192, 0x0, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8183_pin_di_range[] = {
	PIN_FIELD(0, 192, 0x200, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8183_pin_do_range[] = {
	PIN_FIELD(0, 192, 0x100, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8183_pin_ies_range[] = {
	PINS_FIELD_BASE(0, 3, 6, 0x000, 0x10, 3, 1),
	PINS_FIELD_BASE(4, 7, 6, 0x000, 0x10, 5, 1),
	PIN_FIELD_BASE(8, 8, 6, 0x000, 0x10, 0, 1),
	PINS_FIELD_BASE(9, 10, 6, 0x000, 0x10, 12, 1),
	PIN_FIELD_BASE(11, 11, 1, 0x000, 0x10, 3, 1),
	PIN_FIELD_BASE(12, 12, 1, 0x000, 0x10, 7, 1),
	PINS_FIELD_BASE(13, 16, 2, 0x000, 0x10, 2, 1),
	PINS_FIELD_BASE(17, 20, 2, 0x000, 0x10, 3, 1),
	PINS_FIELD_BASE(21, 24, 2, 0x000, 0x10, 4, 1),
	PINS_FIELD_BASE(25, 28, 2, 0x000, 0x10, 5, 1),
	PIN_FIELD_BASE(29, 29, 2, 0x000, 0x10, 6, 1),
	PIN_FIELD_BASE(30, 30, 2, 0x000, 0x10, 7, 1),
	PINS_FIELD_BASE(31, 31, 2, 0x000, 0x10, 8, 1),
	PINS_FIELD_BASE(32, 34, 2, 0x000, 0x10, 7, 1),
	PINS_FIELD_BASE(35, 37, 3, 0x000, 0x10, 0, 1),
	PINS_FIELD_BASE(38, 40, 3, 0x000, 0x10, 1, 1),
	PINS_FIELD_BASE(41, 42, 3, 0x000, 0x10, 2, 1),
	PINS_FIELD_BASE(43, 45, 3, 0x000, 0x10, 3, 1),
	PINS_FIELD_BASE(46, 47, 3, 0x000, 0x10, 4, 1),
	PINS_FIELD_BASE(48, 49, 3, 0x000, 0x10, 5, 1),
	PINS_FIELD_BASE(50, 51, 4, 0x000, 0x10, 0, 1),
	PINS_FIELD_BASE(52, 57, 4, 0x000, 0x10, 1, 1),
	PINS_FIELD_BASE(58, 60, 4, 0x000, 0x10, 2, 1),
	PINS_FIELD_BASE(61, 64, 5, 0x000, 0x10, 0, 1),
	PINS_FIELD_BASE(65, 66, 5, 0x000, 0x10, 1, 1),
	PINS_FIELD_BASE(67, 68, 5, 0x000, 0x10, 2, 1),
	PINS_FIELD_BASE(69, 71, 5, 0x000, 0x10, 3, 1),
	PINS_FIELD_BASE(72, 76, 5, 0x000, 0x10, 4, 1),
	PINS_FIELD_BASE(77, 80, 5, 0x000, 0x10, 5, 1),
	PIN_FIELD_BASE(81, 81, 5, 0x000, 0x10, 6, 1),
	PINS_FIELD_BASE(82, 83, 5, 0x000, 0x10, 7, 1),
	PIN_FIELD_BASE(84, 84, 5, 0x000, 0x10, 6, 1),
	PINS_FIELD_BASE(85, 88, 5, 0x000, 0x10, 8, 1),
	PIN_FIELD_BASE(89, 89, 6, 0x000, 0x10, 11, 1),
	PIN_FIELD_BASE(90, 90, 6, 0x000, 0x10, 1, 1),
	PINS_FIELD_BASE(91, 94, 6, 0x000, 0x10, 2, 1),
	PINS_FIELD_BASE(95, 96, 6, 0x000, 0x10, 6, 1),
	PINS_FIELD_BASE(97, 98, 6, 0x000, 0x10, 7, 1),
	PIN_FIELD_BASE(99, 99, 6, 0x000, 0x10, 8, 1),
	PIN_FIELD_BASE(100, 100, 6, 0x000, 0x10, 9, 1),
	PINS_FIELD_BASE(101, 102, 6, 0x000, 0x10, 10, 1),
	PINS_FIELD_BASE(103, 104, 6, 0x000, 0x10, 13, 1),
	PINS_FIELD_BASE(105, 106, 6, 0x000, 0x10, 14, 1),
	PIN_FIELD_BASE(107, 107, 7, 0x000, 0x10, 0, 1),
	PIN_FIELD_BASE(108, 108, 7, 0x000, 0x10, 1, 1),
	PIN_FIELD_BASE(109, 109, 7, 0x000, 0x10, 2, 1),
	PIN_FIELD_BASE(110, 110, 7, 0x000, 0x10, 0, 1),

Annotation

Immediate include surface: `pinctrl-mtk-mt8183.h`, `pinctrl-paris.h`.
Detected declarations: `function mt8183_pinctrl_init`.
Atlas domain: Driver Families / drivers/pinctrl.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.