drivers/pinctrl/mediatek/pinctrl-mt8365.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mt8365.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/mediatek/pinctrl-mt8365.c
Extension
.c
Size
18177 bytes
Lines
498
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 MediaTek Inc.
 * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
 */

#include <dt-bindings/pinctrl/mt65xx.h>
#include <linux/of.h>
#include <linux/module.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include "pinctrl-mtk-common.h"
#include "pinctrl-mtk-mt8365.h"

static const struct mtk_drv_group_desc mt8365_drv_grp[] = {
	/* 0E4E8SR 4/8/12/16 */
	MTK_DRV_GRP(4, 16, 1, 2, 4),
	/* 0E2E4SR  2/4/6/8 */
	MTK_DRV_GRP(2, 8, 1, 2, 2),
	/* E8E4E2  2/4/6/8/10/12/14/16 */
	MTK_DRV_GRP(2, 16, 0, 2, 2)
};

static const struct mtk_pin_drv_grp mt8365_pin_drv[] = {

	MTK_PIN_DRV_GRP(0, 0x710, 0, 2),
	MTK_PIN_DRV_GRP(1, 0x710, 0, 2),
	MTK_PIN_DRV_GRP(2, 0x710, 0, 2),
	MTK_PIN_DRV_GRP(3, 0x710, 0, 2),
	MTK_PIN_DRV_GRP(4, 0x710, 4, 2),
	MTK_PIN_DRV_GRP(5, 0x710, 4, 2),
	MTK_PIN_DRV_GRP(6, 0x710, 4, 2),
	MTK_PIN_DRV_GRP(7, 0x710, 4, 2),
	MTK_PIN_DRV_GRP(8, 0x710, 8, 2),
	MTK_PIN_DRV_GRP(9, 0x710, 8, 2),
	MTK_PIN_DRV_GRP(10, 0x710, 8, 2),
	MTK_PIN_DRV_GRP(11, 0x710, 8, 2),
	MTK_PIN_DRV_GRP(12, 0x710, 12, 2),
	MTK_PIN_DRV_GRP(13, 0x710, 12, 2),
	MTK_PIN_DRV_GRP(14, 0x710, 12, 2),
	MTK_PIN_DRV_GRP(15, 0x710, 12, 2),
	MTK_PIN_DRV_GRP(16, 0x710, 16, 2),
	MTK_PIN_DRV_GRP(17, 0x710, 16, 2),
	MTK_PIN_DRV_GRP(18, 0x710, 16, 2),
	MTK_PIN_DRV_GRP(19, 0x710, 20, 2),
	MTK_PIN_DRV_GRP(20, 0x710, 24, 2),
	MTK_PIN_DRV_GRP(21, 0x710, 24, 2),
	MTK_PIN_DRV_GRP(22, 0x710, 28, 2),
	MTK_PIN_DRV_GRP(23, 0x720, 0, 2),
	MTK_PIN_DRV_GRP(24, 0x720, 0, 2),
	MTK_PIN_DRV_GRP(25, 0x720, 0, 2),
	MTK_PIN_DRV_GRP(26, 0x720, 4, 2),
	MTK_PIN_DRV_GRP(27, 0x720, 4, 2),
	MTK_PIN_DRV_GRP(28, 0x720, 4, 2),
	MTK_PIN_DRV_GRP(29, 0x720, 4, 2),
	MTK_PIN_DRV_GRP(30, 0x720, 8, 2),
	MTK_PIN_DRV_GRP(31, 0x720, 8, 2),
	MTK_PIN_DRV_GRP(32, 0x720, 8, 2),
	MTK_PIN_DRV_GRP(33, 0x720, 8, 2),
	MTK_PIN_DRV_GRP(34, 0x720, 8, 2),
	MTK_PIN_DRV_GRP(35, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(36, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(37, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(38, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(39, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(40, 0x720, 12, 2),
	MTK_PIN_DRV_GRP(41, 0x720, 16, 2),
	MTK_PIN_DRV_GRP(42, 0x720, 16, 2),
	MTK_PIN_DRV_GRP(43, 0x720, 16, 2),
	MTK_PIN_DRV_GRP(44, 0x720, 16, 2),
	MTK_PIN_DRV_GRP(45, 0x720, 20, 2),
	MTK_PIN_DRV_GRP(46, 0x720, 20, 2),
	MTK_PIN_DRV_GRP(47, 0x720, 20, 2),
	MTK_PIN_DRV_GRP(48, 0x720, 20, 2),
	MTK_PIN_DRV_GRP(49, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(50, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(51, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(52, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(53, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(54, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(55, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(56, 0x720, 24, 2),
	MTK_PIN_DRV_GRP(57, 0x720, 28, 2),
	MTK_PIN_DRV_GRP(58, 0x720, 28, 2),
	MTK_PIN_DRV_GRP(59, 0x730, 0, 2),
	MTK_PIN_DRV_GRP(60, 0x730, 0, 2),
	MTK_PIN_DRV_GRP(61, 0x730, 4, 2),
	MTK_PIN_DRV_GRP(62, 0x730, 4, 2),

Annotation

Implementation Notes