drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c- Extension
.c- Size
- 29370 bytes
- Lines
- 1294
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dt-bindings/pinctrl/mt65xx.hlinux/device.hlinux/err.hlinux/gpio/driver.hlinux/platform_device.hlinux/io.hlinux/module.hlinux/of_address.hlinux/of_irq.hmtk-eint.hpinctrl-mtk-common-v2.h
Detected Declarations
struct mtk_drive_descfunction mtk_w32function mtk_r32function mtk_rmwfunction mtk_hw_pin_field_lookupfunction mtk_hw_pin_field_getfunction mtk_hw_bits_partfunction mtk_hw_write_cross_fieldfunction mtk_hw_read_cross_fieldfunction mtk_hw_set_valuefunction mtk_hw_get_valuefunction mtk_xt_find_eint_numfunction eintfunction mtk_xt_get_gpio_nfunction mtk_xt_get_gpio_statefunction mtk_xt_set_gpio_as_eintfunction mtk_build_eintfunction mtk_pinconf_bias_disable_setfunction mtk_pinconf_bias_disable_getfunction mtk_pinconf_bias_setfunction mtk_pinconf_bias_getfunction mtk_pinconf_bias_disable_set_rev1function mtk_pinconf_bias_disable_get_rev1function mtk_pinconf_bias_set_rev1function mtk_pinconf_bias_get_rev1function mtk_pinconf_bias_set_pu_pdfunction mtk_pinconf_bias_set_pullsel_pullenfunction mtk_pinconf_bias_set_pupd_r1_r0function mtk_hw_pin_rsel_lookupfunction mtk_pinconf_bias_set_rselfunction mtk_pinconf_bias_set_pu_pd_rselfunction mtk_pinconf_bias_set_combofunction mtk_rsel_get_si_unitfunction mtk_pinconf_bias_get_pu_pd_rselfunction mtk_pinconf_bias_get_pu_pdfunction mtk_pinconf_bias_get_pdfunction mtk_pinconf_bias_get_pullsel_pullenfunction mtk_pinconf_bias_get_pupd_r1_r0function mtk_pinconf_bias_get_combofunction mtk_pinconf_drive_setfunction whenfunction mtk_pinconf_drive_getfunction mtk_pinconf_drive_set_rev1function mtk_pinconf_drive_get_rev1function mtk_pinconf_drive_set_rawfunction mtk_pinconf_drive_get_rawfunction mtk_pinconf_adv_pull_setfunction mtk_pinconf_adv_pull_get
Annotated Snippet
struct mtk_drive_desc {
u8 min;
u8 max;
u8 step;
u8 scal;
};
/* The groups of drive strength */
static const struct mtk_drive_desc mtk_drive[] = {
[DRV_GRP0] = { 4, 16, 4, 1 },
[DRV_GRP1] = { 4, 16, 4, 2 },
[DRV_GRP2] = { 2, 8, 2, 1 },
[DRV_GRP3] = { 2, 8, 2, 2 },
[DRV_GRP4] = { 2, 16, 2, 1 },
};
static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val)
{
writel_relaxed(val, pctl->base[i] + reg);
}
static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg)
{
return readl_relaxed(pctl->base[i] + reg);
}
void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set)
{
u32 val;
unsigned long flags;
spin_lock_irqsave(&pctl->lock, flags);
val = mtk_r32(pctl, i, reg);
val &= ~mask;
val |= set;
mtk_w32(pctl, i, reg, val);
spin_unlock_irqrestore(&pctl->lock, flags);
}
static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc,
int field, struct mtk_pin_field *pfd)
{
const struct mtk_pin_field_calc *c;
const struct mtk_pin_reg_calc *rc;
int start = 0, end, check;
bool found = false;
u32 bits;
if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) {
rc = &hw->soc->reg_cal[field];
} else {
dev_dbg(hw->dev,
"Not support field %d for this soc\n", field);
return -ENOTSUPP;
}
end = rc->nranges - 1;
while (start <= end) {
check = (start + end) >> 1;
if (desc->number >= rc->range[check].s_pin
&& desc->number <= rc->range[check].e_pin) {
found = true;
break;
} else if (start == end)
break;
else if (desc->number < rc->range[check].s_pin)
end = check - 1;
else
start = check + 1;
}
if (!found) {
dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n",
field, desc->number, desc->name);
return -ENOTSUPP;
}
c = rc->range + check;
if (c->i_base > hw->nbase - 1) {
dev_err(hw->dev,
"Invalid base for field %d for pin = %d (%s)\n",
field, desc->number, desc->name);
return -EINVAL;
}
Annotation
- Immediate include surface: `dt-bindings/pinctrl/mt65xx.h`, `linux/device.h`, `linux/err.h`, `linux/gpio/driver.h`, `linux/platform_device.h`, `linux/io.h`, `linux/module.h`, `linux/of_address.h`.
- Detected declarations: `struct mtk_drive_desc`, `function mtk_w32`, `function mtk_r32`, `function mtk_rmw`, `function mtk_hw_pin_field_lookup`, `function mtk_hw_pin_field_get`, `function mtk_hw_bits_part`, `function mtk_hw_write_cross_field`, `function mtk_hw_read_cross_field`, `function mtk_hw_set_value`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.