drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c- Extension
.c- Size
- 3230 bytes
- Lines
- 122
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/device.hlinux/regmap.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinmux.hpinctrl-meson.hpinctrl-meson-axg-pmx.h
Detected Declarations
function Copyrightfunction meson_pmx_calc_reg_and_offsetfunction meson_axg_pmx_update_functionfunction meson_axg_pmx_set_muxfunction meson_axg_pmx_request_gpioexport meson_axg_pmx_ops
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Second generation of pinmux driver for Amlogic Meson-AXG SoC.
*
* Copyright (c) 2017 Baylibre SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*
* Copyright (c) 2017 Amlogic, Inc. All rights reserved.
* Author: Xingyu Chen <xingyu.chen@amlogic.com>
*/
/*
* This new generation of pinctrl IP is mainly adopted by the
* Meson-AXG SoC and later series, which use 4-width continuous
* register bit to select the function for each pin.
*
* The value 0 is always selecting the GPIO mode, while other
* values (start from 1) for selecting the function mode.
*/
#include <linux/device.h>
#include <linux/regmap.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include "pinctrl-meson.h"
#include "pinctrl-meson-axg-pmx.h"
static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
unsigned int pin,
const struct meson_pmx_bank **bank)
{
int i;
const struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
for (i = 0; i < pmx->num_pmx_banks; i++)
if (pin >= pmx->pmx_banks[i].first &&
pin <= pmx->pmx_banks[i].last) {
*bank = &pmx->pmx_banks[i];
return 0;
}
return -EINVAL;
}
static int meson_pmx_calc_reg_and_offset(const struct meson_pmx_bank *bank,
unsigned int pin, unsigned int *reg,
unsigned int *offset)
{
int shift;
shift = pin - bank->first;
*reg = bank->reg + (bank->offset + (shift << 2)) / 32;
*offset = (bank->offset + (shift << 2)) % 32;
return 0;
}
static int meson_axg_pmx_update_function(struct meson_pinctrl *pc,
unsigned int pin, unsigned int func)
{
const struct meson_pmx_bank *bank;
int ret;
int reg;
int offset;
ret = meson_axg_pmx_get_bank(pc, pin, &bank);
if (ret)
return ret;
meson_pmx_calc_reg_and_offset(bank, pin, ®, &offset);
ret = regmap_update_bits(pc->reg_mux, reg << 2,
0xf << offset, (func & 0xf) << offset);
return ret;
}
static int meson_axg_pmx_set_mux(struct pinctrl_dev *pcdev,
unsigned int func_num, unsigned int group_num)
{
int i;
int ret;
struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
const struct meson_pmx_func *func = &pc->data->funcs[func_num];
const struct meson_pmx_group *group = &pc->data->groups[group_num];
struct meson_pmx_axg_data *pmx_data =
(struct meson_pmx_axg_data *)group->data;
dev_dbg(pc->dev, "enable function %s, group %s\n", func->name,
Annotation
- Immediate include surface: `linux/device.h`, `linux/regmap.h`, `linux/pinctrl/pinctrl.h`, `linux/pinctrl/pinmux.h`, `pinctrl-meson.h`, `pinctrl-meson-axg-pmx.h`.
- Detected declarations: `function Copyright`, `function meson_pmx_calc_reg_and_offset`, `function meson_axg_pmx_update_function`, `function meson_axg_pmx_set_mux`, `function meson_axg_pmx_request_gpio`, `export meson_axg_pmx_ops`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.