drivers/pinctrl/microchip/pinctrl-mpfs-iomux0.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/microchip/pinctrl-mpfs-iomux0.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/microchip/pinctrl-mpfs-iomux0.c
Extension
.c
Size
8822 bytes
Lines
279
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mpfs_iomux0_pinctrl {
	struct pinctrl_dev *pctrl;
	struct device *dev;
	struct regmap *regmap;
	struct pinctrl_desc desc;
};

struct mpfs_iomux0_pin_group {
	const char *name;
	const unsigned int *pins;
	u32 mask;
	u32 setting;
};

struct mpfs_iomux0_function {
	const char *name;
	const char * const *groups;
};

static const struct pinctrl_pin_desc mpfs_iomux0_pins[] = {
	PINCTRL_PIN(0, "spi0"),
	PINCTRL_PIN(1, "spi1"),
	PINCTRL_PIN(2, "i2c0"),
	PINCTRL_PIN(3, "i2c1"),
	PINCTRL_PIN(4, "can0"),
	PINCTRL_PIN(5, "can1"),
	PINCTRL_PIN(6, "qspi"),
	PINCTRL_PIN(7, "uart0"),
	PINCTRL_PIN(8, "uart1"),
	PINCTRL_PIN(9, "uart2"),
	PINCTRL_PIN(10, "uart3"),
	PINCTRL_PIN(11, "uart4"),
	PINCTRL_PIN(12, "mdio0"),
	PINCTRL_PIN(13, "mdio1"),
};

static const unsigned int mpfs_iomux0_spi0_pins[] = { 0 };
static const unsigned int mpfs_iomux0_spi1_pins[] = { 1 };
static const unsigned int mpfs_iomux0_i2c0_pins[] = { 2 };
static const unsigned int mpfs_iomux0_i2c1_pins[] = { 3 };
static const unsigned int mpfs_iomux0_can0_pins[] = { 4 };
static const unsigned int mpfs_iomux0_can1_pins[] = { 5 };
static const unsigned int mpfs_iomux0_qspi_pins[] = { 6 };
static const unsigned int mpfs_iomux0_uart0_pins[] = { 7 };
static const unsigned int mpfs_iomux0_uart1_pins[] = { 8 };
static const unsigned int mpfs_iomux0_uart2_pins[] = { 9 };
static const unsigned int mpfs_iomux0_uart3_pins[] = { 10 };
static const unsigned int mpfs_iomux0_uart4_pins[] = { 11 };
static const unsigned int mpfs_iomux0_mdio0_pins[] = { 12 };
static const unsigned int mpfs_iomux0_mdio1_pins[] = { 13 };

#define MPFS_IOMUX0_GROUP(_name, _mask) { \
	.name = #_name "_mssio",	\
	.pins = mpfs_iomux0_##_name##_pins,	\
	.mask = _mask,	\
	.setting = 0x0,	\
}, { \
	.name = #_name "_fabric",	\
	.pins = mpfs_iomux0_##_name##_pins,	\
	.mask = _mask,	\
	.setting = _mask,	\
}

static const struct mpfs_iomux0_pin_group mpfs_iomux0_pin_groups[] = {
	MPFS_IOMUX0_GROUP(spi0, BIT(0)),
	MPFS_IOMUX0_GROUP(spi1, BIT(1)),
	MPFS_IOMUX0_GROUP(i2c0, BIT(2)),
	MPFS_IOMUX0_GROUP(i2c1, BIT(3)),
	MPFS_IOMUX0_GROUP(can0, BIT(4)),
	MPFS_IOMUX0_GROUP(can1, BIT(5)),
	MPFS_IOMUX0_GROUP(qspi, BIT(6)),
	MPFS_IOMUX0_GROUP(uart0, BIT(7)),
	MPFS_IOMUX0_GROUP(uart1, BIT(8)),
	MPFS_IOMUX0_GROUP(uart2, BIT(9)),
	MPFS_IOMUX0_GROUP(uart3, BIT(10)),
	MPFS_IOMUX0_GROUP(uart4, BIT(11)),
	MPFS_IOMUX0_GROUP(mdio0, BIT(12)),
	MPFS_IOMUX0_GROUP(mdio1, BIT(13)),
};

static const char * const mpfs_iomux0_spi0_groups[] = { "spi0_mssio", "spi0_fabric" };
static const char * const mpfs_iomux0_spi1_groups[] = { "spi1_mssio", "spi1_fabric" };
static const char * const mpfs_iomux0_i2c0_groups[] = { "i2c0_mssio", "i2c0_fabric" };
static const char * const mpfs_iomux0_i2c1_groups[] = { "i2c1_mssio", "i2c1_fabric" };
static const char * const mpfs_iomux0_can0_groups[] = { "can0_mssio", "can0_fabric" };
static const char * const mpfs_iomux0_can1_groups[] = { "can1_mssio", "can1_fabric" };
static const char * const mpfs_iomux0_qspi_groups[] = { "qspi_mssio", "qspi_fabric" };
static const char * const mpfs_iomux0_uart0_groups[] = { "uart0_mssio", "uart0_fabric" };
static const char * const mpfs_iomux0_uart1_groups[] = { "uart1_mssio", "uart1_fabric" };
static const char * const mpfs_iomux0_uart2_groups[] = { "uart2_mssio", "uart2_fabric" };

Annotation

Implementation Notes