drivers/pinctrl/microchip/pinctrl-pic64gx-gpio2.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/microchip/pinctrl-pic64gx-gpio2.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/microchip/pinctrl-pic64gx-gpio2.c
Extension
.c
Size
9358 bytes
Lines
357
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct pic64gx_gpio2_pinctrl {
	struct pinctrl_dev *pctrl;
	struct device *dev;
	struct regmap *regmap;
	struct pinctrl_desc desc;
};

struct pic64gx_gpio2_pin_group {
	const char *name;
	const unsigned int *pins;
	const unsigned int num_pins;
	u32 mask;
	u32 setting;
};

struct pic64gx_gpio2_function {
	const char *name;
	const char * const *groups;
	const unsigned int num_groups;
};

static const struct pinctrl_pin_desc pic64gx_gpio2_pins[] = {
	PINCTRL_PIN(0, "E14"),
	PINCTRL_PIN(1, "E15"),
	PINCTRL_PIN(2, "F16"),
	PINCTRL_PIN(3, "F17"),
	PINCTRL_PIN(4, "D19"),
	PINCTRL_PIN(5, "B18"),
	PINCTRL_PIN(6, "B10"),
	PINCTRL_PIN(7, "C14"),
	PINCTRL_PIN(8, "E18"),
	PINCTRL_PIN(9, "D18"),
	PINCTRL_PIN(10, "E19"),
	PINCTRL_PIN(11, "C7"),
	PINCTRL_PIN(12, "D6"),
	PINCTRL_PIN(13, "D7"),
	PINCTRL_PIN(14, "C9"),
	PINCTRL_PIN(15, "C10"),
	PINCTRL_PIN(16, "A5"),
	PINCTRL_PIN(17, "A6"),
	PINCTRL_PIN(18, "D8"),
	PINCTRL_PIN(19, "D9"),
	PINCTRL_PIN(20, "B8"),
	PINCTRL_PIN(21, "A8"),
	PINCTRL_PIN(22, "C12"),
	PINCTRL_PIN(23, "B12"),
	PINCTRL_PIN(24, "A11"),
	PINCTRL_PIN(25, "A10"),
	PINCTRL_PIN(26, "D11"),
	PINCTRL_PIN(27, "C11"),
	PINCTRL_PIN(28, "B9"),
};

static const unsigned int pic64gx_gpio2_mdio0_pins[] = {
	0, 1
};

static const unsigned int pic64gx_gpio2_mdio1_pins[] = {
	2, 3
};

static const unsigned int pic64gx_gpio2_spi0_pins[] = {
	4, 5, 10, 11
};

static const unsigned int pic64gx_gpio2_can0_pins[] = {
	6, 24, 28
};

static const unsigned int pic64gx_gpio2_pcie_pins[] = {
	7, 8, 9
};

static const unsigned int pic64gx_gpio2_qspi_pins[] = {
	12, 13, 14, 15, 16, 17
};

static const unsigned int pic64gx_gpio2_uart3_pins[] = {
	18, 19
};

static const unsigned int pic64gx_gpio2_uart4_pins[] = {
	20, 21
};

static const unsigned int pic64gx_gpio2_can1_pins[] = {
	22, 23, 25
};

static const unsigned int pic64gx_gpio2_uart2_pins[] = {

Annotation

Implementation Notes