drivers/pinctrl/nxp/pinctrl-s32g2.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/nxp/pinctrl-s32g2.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/nxp/pinctrl-s32g2.c
Extension
.c
Size
26115 bytes
Lines
819
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * NXP S32G pinctrl driver
 *
 * Copyright 2015-2016 Freescale Semiconductor, Inc.
 * Copyright 2017-2018, 2020-2022 NXP
 * Copyright (C) 2022 SUSE LLC
 */

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-s32.h"

enum s32_pins {
	S32G_MSCR_PA_00 =  0,
	S32G_MSCR_PA_01 =  1,
	S32G_MSCR_PA_02 =  2,
	S32G_MSCR_PA_03 =  3,
	S32G_MSCR_PA_04 =  4,
	S32G_MSCR_PA_05 =  5,
	S32G_MSCR_PA_06 =  6,
	S32G_MSCR_PA_07 =  7,
	S32G_MSCR_PA_08 =  8,
	S32G_MSCR_PA_09 =  9,
	S32G_MSCR_PA_10 =  10,
	S32G_MSCR_PA_11 =  11,
	S32G_MSCR_PA_12 =  12,
	S32G_MSCR_PA_13 =  13,
	S32G_MSCR_PA_14 =  14,
	S32G_MSCR_PA_15 =  15,
	S32G_MSCR_PB_00 =  16,
	S32G_MSCR_PB_01 =  17,
	S32G_MSCR_PB_02 =  18,
	S32G_MSCR_PB_03 =  19,
	S32G_MSCR_PB_04 =  20,
	S32G_MSCR_PB_05 =  21,
	S32G_MSCR_PB_06 =  22,
	S32G_MSCR_PB_07 =  23,
	S32G_MSCR_PB_08 =  24,
	S32G_MSCR_PB_09 =  25,
	S32G_MSCR_PB_10 =  26,
	S32G_MSCR_PB_11 =  27,
	S32G_MSCR_PB_12 =  28,
	S32G_MSCR_PB_13 =  29,
	S32G_MSCR_PB_14 =  30,
	S32G_MSCR_PB_15 =  31,
	S32G_MSCR_PC_00 =  32,
	S32G_MSCR_PC_01 =  33,
	S32G_MSCR_PC_02 =  34,
	S32G_MSCR_PC_03 =  35,
	S32G_MSCR_PC_04 =  36,
	S32G_MSCR_PC_05 =  37,
	S32G_MSCR_PC_06 =  38,
	S32G_MSCR_PC_07 =  39,
	S32G_MSCR_PC_08 =  40,
	S32G_MSCR_PC_09 =  41,
	S32G_MSCR_PC_10 =  42,
	S32G_MSCR_PC_11 =  43,
	S32G_MSCR_PC_12 =  44,
	S32G_MSCR_PC_13 =  45,
	S32G_MSCR_PC_14 =  46,
	S32G_MSCR_PC_15 =  47,
	S32G_MSCR_PD_00 =  48,
	S32G_MSCR_PD_01 =  49,
	S32G_MSCR_PD_02 =  50,
	S32G_MSCR_PD_03 =  51,
	S32G_MSCR_PD_04 =  52,
	S32G_MSCR_PD_05 =  53,
	S32G_MSCR_PD_06 =  54,
	S32G_MSCR_PD_07 =  55,
	S32G_MSCR_PD_08 =  56,
	S32G_MSCR_PD_09 =  57,
	S32G_MSCR_PD_10 =  58,
	S32G_MSCR_PD_11 =  59,
	S32G_MSCR_PD_12 =  60,
	S32G_MSCR_PD_13 =  61,
	S32G_MSCR_PD_14 =  62,
	S32G_MSCR_PD_15 =  63,
	S32G_MSCR_PE_00 =  64,
	S32G_MSCR_PE_01 =  65,
	S32G_MSCR_PE_02 =  66,
	S32G_MSCR_PE_03 =  67,
	S32G_MSCR_PE_04 =  68,
	S32G_MSCR_PE_05 =  69,

Annotation

Implementation Notes