drivers/pinctrl/pinctrl-cy8c95x0.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/pinctrl-cy8c95x0.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/pinctrl-cy8c95x0.c- Extension
.c- Size
- 40364 bytes
- Lines
- 1503
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/bitmap.hlinux/cleanup.hlinux/dmi.hlinux/gpio/driver.hlinux/gpio/consumer.hlinux/i2c.hlinux/init.hlinux/interrupt.hlinux/mod_devicetable.hlinux/module.hlinux/property.hlinux/regmap.hlinux/regulator/consumer.hlinux/seq_file.hlinux/pinctrl/consumer.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinconf-generic.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinmux.h
Detected Declarations
struct cy8c95x0_pinctrlfunction cy8c95x0_acpi_get_irqfunction cypress_get_portfunction cypress_get_pin_maskfunction cy8c95x0_readable_registerfunction cy8c95x0_writeable_registerfunction cy8c95x0_volatile_registerfunction cy8c95x0_precious_registerfunction cy8c95x0_muxed_registerfunction cy8c95x0_wc_registerfunction cy8c95x0_quick_path_registerfunction cy8c95x0_regmap_update_bits_basefunction cy8c95x0_regmap_write_bitsfunction cy8c95x0_regmap_update_bitsfunction cy8c95x0_regmap_read_bitsfunction cy8c95x0_write_regs_maskfunction for_each_set_clump8function cy8c95x0_read_regs_maskfunction for_each_set_clump8function cy8c95x0_pinmux_directionfunction cy8c95x0_gpio_direction_inputfunction cy8c95x0_gpio_direction_outputfunction cy8c95x0_gpio_get_valuefunction cy8c95x0_gpio_set_valuefunction cy8c95x0_gpio_get_directionfunction cy8c95x0_gpio_get_pincfgfunction cy8c95x0_gpio_set_pincfgfunction cy8c95x0_gpio_get_multiplefunction cy8c95x0_gpio_set_multiplefunction cy8c95x0_add_pin_rangesfunction cy8c95x0_setup_gpiochipfunction cy8c95x0_irq_maskfunction cy8c95x0_irq_unmaskfunction cy8c95x0_irq_bus_lockfunction cy8c95x0_irq_bus_sync_unlockfunction cy8c95x0_irq_set_typefunction cy8c95x0_irq_shutdownfunction cy8c95x0_irq_pendingfunction cy8c95x0_irq_handlerfunction cy8c95x0_pinctrl_get_groups_countfunction cy8c95x0_pinctrl_get_group_pinsfunction cy8c95x0_pin_dbg_showfunction cy8c95x0_get_functions_countfunction cy8c95x0_get_function_groupsfunction cy8c95x0_set_modefunction cy8c95x0_pinmux_modefunction cy8c95x0_set_muxfunction cy8c95x0_gpio_request_enable
Annotated Snippet
struct cy8c95x0_pinctrl {
struct regmap *regmap;
struct mutex irq_lock;
struct mutex i2c_lock;
DECLARE_BITMAP(irq_mask, MAX_LINE);
DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
DECLARE_BITMAP(irq_trig_low, MAX_LINE);
DECLARE_BITMAP(irq_trig_high, MAX_LINE);
DECLARE_BITMAP(push_pull, MAX_LINE);
DECLARE_BITMAP(map, MAX_LINE);
unsigned int nport;
struct gpio_chip gpio_chip;
struct device *dev;
struct pinctrl_dev *pctldev;
struct pinctrl_desc pinctrl_desc;
unsigned int tpin;
struct gpio_desc *gpio_reset;
};
static const struct pinctrl_pin_desc cy8c9560_pins[] = {
PINCTRL_PIN(0, "gp00"),
PINCTRL_PIN(1, "gp01"),
PINCTRL_PIN(2, "gp02"),
PINCTRL_PIN(3, "gp03"),
PINCTRL_PIN(4, "gp04"),
PINCTRL_PIN(5, "gp05"),
PINCTRL_PIN(6, "gp06"),
PINCTRL_PIN(7, "gp07"),
PINCTRL_PIN(8, "gp10"),
PINCTRL_PIN(9, "gp11"),
PINCTRL_PIN(10, "gp12"),
PINCTRL_PIN(11, "gp13"),
PINCTRL_PIN(12, "gp14"),
PINCTRL_PIN(13, "gp15"),
PINCTRL_PIN(14, "gp16"),
PINCTRL_PIN(15, "gp17"),
PINCTRL_PIN(16, "gp20"),
PINCTRL_PIN(17, "gp21"),
PINCTRL_PIN(18, "gp22"),
PINCTRL_PIN(19, "gp23"),
PINCTRL_PIN(20, "gp30"),
PINCTRL_PIN(21, "gp31"),
PINCTRL_PIN(22, "gp32"),
PINCTRL_PIN(23, "gp33"),
PINCTRL_PIN(24, "gp34"),
PINCTRL_PIN(25, "gp35"),
PINCTRL_PIN(26, "gp36"),
PINCTRL_PIN(27, "gp37"),
PINCTRL_PIN(28, "gp40"),
PINCTRL_PIN(29, "gp41"),
PINCTRL_PIN(30, "gp42"),
PINCTRL_PIN(31, "gp43"),
PINCTRL_PIN(32, "gp44"),
PINCTRL_PIN(33, "gp45"),
PINCTRL_PIN(34, "gp46"),
PINCTRL_PIN(35, "gp47"),
PINCTRL_PIN(36, "gp50"),
PINCTRL_PIN(37, "gp51"),
PINCTRL_PIN(38, "gp52"),
PINCTRL_PIN(39, "gp53"),
PINCTRL_PIN(40, "gp54"),
PINCTRL_PIN(41, "gp55"),
PINCTRL_PIN(42, "gp56"),
PINCTRL_PIN(43, "gp57"),
PINCTRL_PIN(44, "gp60"),
PINCTRL_PIN(45, "gp61"),
PINCTRL_PIN(46, "gp62"),
PINCTRL_PIN(47, "gp63"),
PINCTRL_PIN(48, "gp64"),
PINCTRL_PIN(49, "gp65"),
PINCTRL_PIN(50, "gp66"),
PINCTRL_PIN(51, "gp67"),
PINCTRL_PIN(52, "gp70"),
PINCTRL_PIN(53, "gp71"),
PINCTRL_PIN(54, "gp72"),
PINCTRL_PIN(55, "gp73"),
PINCTRL_PIN(56, "gp74"),
PINCTRL_PIN(57, "gp75"),
PINCTRL_PIN(58, "gp76"),
PINCTRL_PIN(59, "gp77"),
};
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/bitmap.h`, `linux/cleanup.h`, `linux/dmi.h`, `linux/gpio/driver.h`, `linux/gpio/consumer.h`, `linux/i2c.h`, `linux/init.h`.
- Detected declarations: `struct cy8c95x0_pinctrl`, `function cy8c95x0_acpi_get_irq`, `function cypress_get_port`, `function cypress_get_pin_mask`, `function cy8c95x0_readable_register`, `function cy8c95x0_writeable_register`, `function cy8c95x0_volatile_register`, `function cy8c95x0_precious_register`, `function cy8c95x0_muxed_register`, `function cy8c95x0_wc_register`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.