drivers/pinctrl/pinctrl-equilibrium.h

Source file repositories/reference/linux-study-clean/drivers/pinctrl/pinctrl-equilibrium.h

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/pinctrl-equilibrium.h
Extension
.h
Size
4283 bytes
Lines
133
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct gpio_irq_type {
	unsigned int trig_type;
	unsigned int edge_type;
	unsigned int logic_type;
};

/**
 * struct eqbr_pin_bank: represent a pin bank.
 * @membase: base address of the pin bank register.
 * @id: bank id, to idenify the unique bank.
 * @pin_base: starting pin number of the pin bank.
 * @nr_pins: number of the pins of the pin bank.
 * @aval_pinmap: available pin bitmap of the pin bank.
 */
struct eqbr_pin_bank {
	void __iomem		*membase;
	unsigned int		id;
	unsigned int		pin_base;
	unsigned int		nr_pins;
	u32			aval_pinmap;
};

struct fwnode_handle;

/**
 * struct eqbr_gpio_ctrl: represent a gpio controller.
 * @chip: gpio chip.
 * @fwnode: firmware node of gpio controller.
 * @bank: pointer to corresponding pin bank.
 * @membase: base address of the gpio controller.
 * @name: gpio chip name.
 * @virq: irq number of the gpio chip to parent's irq domain.
 * @lock: spin lock to protect gpio register write.
 */
struct eqbr_gpio_ctrl {
	struct gpio_generic_chip chip;
	struct fwnode_handle	*fwnode;
	struct eqbr_pin_bank	*bank;
	void __iomem		*membase;
	const char		*name;
	unsigned int		virq;
	raw_spinlock_t		lock; /* protect gpio register */
};

/**
 * struct eqbr_pinctrl_drv_data:
 * @dev: device instance representing the controller.
 * @pctl_desc: pin controller descriptor.
 * @pctl_dev: pin control class device
 * @membase: base address of pin controller
 * @pin_banks: list of pin banks of the driver.
 * @nr_banks: number of pin banks.
 * @gpio_ctrls: list of gpio controllers.
 * @nr_gpio_ctrls: number of gpio controllers.
 * @lock: protect pinctrl register write
 */
struct eqbr_pinctrl_drv_data {
	struct device			*dev;
	struct pinctrl_desc		pctl_desc;
	struct pinctrl_dev		*pctl_dev;
	void __iomem			*membase;
	struct eqbr_pin_bank		*pin_banks;
	unsigned int			nr_banks;
	struct eqbr_gpio_ctrl		*gpio_ctrls;
	unsigned int			nr_gpio_ctrls;
	raw_spinlock_t			lock; /* protect pinpad register */
};

#endif /* __PINCTRL_EQUILIBRIUM_H */

Annotation

Implementation Notes