drivers/pinctrl/pinctrl-lantiq.h
Source file repositories/reference/linux-study-clean/drivers/pinctrl/pinctrl-lantiq.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/pinctrl-lantiq.h- Extension
.h- Size
- 3435 bytes
- Lines
- 202
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clkdev.hlinux/pinctrl/consumer.hlinux/pinctrl/machine.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinmux.hcore.h
Detected Declarations
struct ltq_cfg_paramstruct ltq_mfp_pinstruct ltq_pin_groupstruct ltq_pmx_funcstruct ltq_pinmux_infoenum ltq_pinconf_paramenum ltq_pin
Annotated Snippet
struct ltq_cfg_param {
const char *property;
enum ltq_pinconf_param param;
};
struct ltq_mfp_pin {
const char *name;
const unsigned int pin;
const unsigned short func[LTQ_MAX_MUX];
};
struct ltq_pin_group {
const char *name;
const unsigned mux;
const unsigned *pins;
const unsigned npins;
};
struct ltq_pmx_func {
const char *name;
const char * const *groups;
const unsigned num_groups;
};
struct ltq_pinmux_info {
struct device *dev;
struct pinctrl_dev *pctrl;
/* we need to manage up to 5 pad controllers */
void __iomem *membase[5];
/* the descriptor for the subsystem */
struct pinctrl_desc *desc;
/* we expose our pads to the subsystem */
struct pinctrl_pin_desc *pads;
/* the number of pads. this varies between socs */
unsigned int num_pads;
/* these are our multifunction pins */
const struct ltq_mfp_pin *mfp;
unsigned int num_mfp;
/* a number of multifunction pins can be grouped together */
const struct ltq_pin_group *grps;
unsigned int num_grps;
/* a mapping between function string and id */
const struct ltq_pmx_func *funcs;
unsigned int num_funcs;
/* the pinconf options that we are able to read from the DT */
const struct ltq_cfg_param *params;
unsigned int num_params;
/* the pad controller can have a irq mapping */
const unsigned *exin;
unsigned int num_exin;
/* we need 5 clocks max */
struct clk *clk[5];
/* soc specific callback used to apply muxing */
int (*apply_mux)(struct pinctrl_dev *pctrldev, int pin, int mux);
};
enum ltq_pin {
GPIO0 = 0,
GPIO1,
GPIO2,
GPIO3,
GPIO4,
GPIO5,
GPIO6,
GPIO7,
GPIO8,
GPIO9,
GPIO10, /* 10 */
GPIO11,
GPIO12,
GPIO13,
GPIO14,
GPIO15,
GPIO16,
GPIO17,
GPIO18,
GPIO19,
GPIO20, /* 20 */
GPIO21,
Annotation
- Immediate include surface: `linux/clkdev.h`, `linux/pinctrl/consumer.h`, `linux/pinctrl/machine.h`, `linux/pinctrl/pinconf.h`, `linux/pinctrl/pinctrl.h`, `linux/pinctrl/pinmux.h`, `core.h`.
- Detected declarations: `struct ltq_cfg_param`, `struct ltq_mfp_pin`, `struct ltq_pin_group`, `struct ltq_pmx_func`, `struct ltq_pinmux_info`, `enum ltq_pinconf_param`, `enum ltq_pin`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.