drivers/pinctrl/pxa/pinctrl-pxa25x.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/pxa/pinctrl-pxa25x.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/pxa/pinctrl-pxa25x.c
Extension
.c
Size
9015 bytes
Lines
265
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Marvell PXA25x family pin control
 *
 * Copyright (C) 2016 Robert Jarzmik
 */
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-pxa2xx.h"

static const struct pxa_desc_pin pxa25x_pins[] = {
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(1),
		     PXA_FUNCTION(0, 1, "GP_RST")),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(2)),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(3)),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(4)),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(5)),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(6),
		     PXA_FUNCTION(1, 1, "MMCCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(7),
		     PXA_FUNCTION(1, 1, "48_MHz")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(8),
		     PXA_FUNCTION(1, 1, "MMCCS0")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
		     PXA_FUNCTION(1, 1, "MMCCS1")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
		     PXA_FUNCTION(1, 1, "RTCCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
		     PXA_FUNCTION(1, 1, "3_6_MHz")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
		     PXA_FUNCTION(1, 1, "32_kHz")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
		     PXA_FUNCTION(1, 2, "MBGNT")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
		     PXA_FUNCTION(0, 1, "MBREQ")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(15),
		     PXA_FUNCTION(1, 2, "nCS_1")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
		     PXA_FUNCTION(1, 2, "PWM0")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
		     PXA_FUNCTION(1, 2, "PWM1")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
		     PXA_FUNCTION(0, 1, "RDY")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
		     PXA_FUNCTION(0, 1, "DREQ[1]")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
		     PXA_FUNCTION(0, 1, "DREQ[0]")),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(21)),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(22)),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
		     PXA_FUNCTION(1, 2, "SCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
		     PXA_FUNCTION(1, 2, "SFRM")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),
		     PXA_FUNCTION(1, 2, "TXD")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(26),
		     PXA_FUNCTION(0, 1, "RXD")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(27),
		     PXA_FUNCTION(0, 1, "EXTCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(28),
		     PXA_FUNCTION(0, 1, "BITCLK"),
		     PXA_FUNCTION(0, 2, "BITCLK"),
		     PXA_FUNCTION(1, 1, "BITCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(29),
		     PXA_FUNCTION(0, 1, "SDATA_IN0"),
		     PXA_FUNCTION(0, 2, "SDATA_IN")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(30),
		     PXA_FUNCTION(1, 1, "SDATA_OUT"),
		     PXA_FUNCTION(1, 2, "SDATA_OUT")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(31),
		     PXA_FUNCTION(1, 1, "SYNC"),
		     PXA_FUNCTION(1, 2, "SYNC")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(32),
		     PXA_FUNCTION(0, 1, "SDATA_IN1"),
		     PXA_FUNCTION(1, 1, "SYSCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(33),
		     PXA_FUNCTION(1, 2, "nCS[5]")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(34),
		     PXA_FUNCTION(0, 1, "FFRXD"),
		     PXA_FUNCTION(1, 2, "MMCCS0")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(35),
		     PXA_FUNCTION(0, 1, "CTS")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(36),
		     PXA_FUNCTION(0, 1, "DCD")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(37),
		     PXA_FUNCTION(0, 1, "DSR")),

Annotation

Implementation Notes