drivers/pinctrl/pxa/pinctrl-pxa27x.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/pxa/pinctrl-pxa27x.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/pxa/pinctrl-pxa27x.c
Extension
.c
Size
20425 bytes
Lines
556
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Marvell PXA27x family pin control
 *
 * Copyright (C) 2015 Robert Jarzmik
 */
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-pxa2xx.h"

static const struct pxa_desc_pin pxa27x_pins[] = {
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(1)),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
		     PXA_FUNCTION(0, 3, "FFCTS"),
		     PXA_FUNCTION(1, 1, "HZ_CLK"),
		     PXA_FUNCTION(1, 3, "CHOUT<0>")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
		     PXA_FUNCTION(0, 1, "FFDCD"),
		     PXA_FUNCTION(0, 3, "USB_P3_5"),
		     PXA_FUNCTION(1, 1, "HZ_CLK"),
		     PXA_FUNCTION(1, 3, "CHOUT<1>")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
		     PXA_FUNCTION(0, 1, "EXT_SYNC<0>"),
		     PXA_FUNCTION(0, 2, "SSPRXD2"),
		     PXA_FUNCTION(0, 3, "USB_P3_1"),
		     PXA_FUNCTION(1, 1, "CHOUT<0>"),
		     PXA_FUNCTION(1, 1, "PWM_OUT<2>"),
		     PXA_FUNCTION(1, 3, "48_MHz")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
		     PXA_FUNCTION(0, 1, "EXT_SYNC<1>"),
		     PXA_FUNCTION(0, 2, "CIF_DD<7>"),
		     PXA_FUNCTION(1, 1, "CHOUT<1>"),
		     PXA_FUNCTION(1, 1, "PWM_OUT<3>"),
		     PXA_FUNCTION(1, 3, "48_MHz")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
		     PXA_FUNCTION(0, 1, "CLK_EXT"),
		     PXA_FUNCTION(0, 2, "KP_DKIN<7>"),
		     PXA_FUNCTION(0, 3, "KP_MKIN<7>"),
		     PXA_FUNCTION(1, 1, "SSPTXD2")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
		     PXA_FUNCTION(0, 1, "L_VSYNC"),
		     PXA_FUNCTION(0, 2, "SSPSFRM2"),
		     PXA_FUNCTION(1, 1, "SSPSFRM2"),
		     PXA_FUNCTION(1, 3, "UCLK")),
	PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(15)),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
		     PXA_FUNCTION(0, 1, "KP_MKIN<5>"),
		     PXA_FUNCTION(1, 2, "PWM_OUT<0>"),
		     PXA_FUNCTION(1, 3, "FFTXD")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
		     PXA_FUNCTION(0, 1, "KP_MKIN<6>"),
		     PXA_FUNCTION(0, 2, "CIF_DD<6>"),
		     PXA_FUNCTION(1, 2, "PWM_OUT<1>")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
		     PXA_FUNCTION(0, 1, "RDY")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
		     PXA_FUNCTION(0, 1, "SSPSCLK2"),
		     PXA_FUNCTION(0, 3, "FFRXD"),
		     PXA_FUNCTION(1, 1, "SSPSCLK2"),
		     PXA_FUNCTION(1, 2, "L_CS"),
		     PXA_FUNCTION(1, 3, "nURST")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
		     PXA_FUNCTION(0, 1, "DREQ<0>"),
		     PXA_FUNCTION(0, 2, "MBREQ"),
		     PXA_FUNCTION(1, 1, "nSDCS<2>")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(21),
		     PXA_FUNCTION(1, 1, "nSDCS<3>"),
		     PXA_FUNCTION(1, 2, "DVAL<0>"),
		     PXA_FUNCTION(1, 3, "MBGNT")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(22),
		     PXA_FUNCTION(0, 1, "SSPEXTCLK2"),
		     PXA_FUNCTION(0, 2, "SSPSCLKEN2"),
		     PXA_FUNCTION(0, 3, "SSPSCLK2"),
		     PXA_FUNCTION(1, 1, "KP_MKOUT<7>"),
		     PXA_FUNCTION(1, 2, "SSPSYSCLK2"),
		     PXA_FUNCTION(1, 3, "SSPSCLK2")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
		     PXA_FUNCTION(0, 2, "SSPSCLK"),
		     PXA_FUNCTION(1, 1, "CIF_MCLK"),
		     PXA_FUNCTION(1, 1, "SSPSCLK")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
		     PXA_FUNCTION(0, 1, "CIF_FV"),
		     PXA_FUNCTION(0, 2, "SSPSFRM"),
		     PXA_FUNCTION(1, 1, "CIF_FV"),
		     PXA_FUNCTION(1, 2, "SSPSFRM")),
	PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),

Annotation

Implementation Notes