drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c- Extension
.c- Size
- 22355 bytes
- Lines
- 879
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/gpio/driver.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/of_irq.hlinux/platform_device.hlinux/regmap.hlinux/seq_file.hlinux/slab.hlinux/string_choices.hlinux/pinctrl/pinconf-generic.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinmux.hdt-bindings/pinctrl/qcom,pmic-gpio.h../core.h../pinctrl-utils.h
Detected Declarations
struct pm8xxx_pin_datastruct pm8xxx_gpiofunction pm8xxx_read_bankfunction pm8xxx_write_bankfunction pm8xxx_get_groups_countfunction pm8xxx_get_group_pinsfunction pm8xxx_get_functions_countfunction pm8xxx_get_function_groupsfunction pm8xxx_pinmux_set_muxfunction pm8xxx_pin_config_getfunction pm8xxx_pin_config_setfunction pm8xxx_gpio_direction_inputfunction pm8xxx_gpio_direction_outputfunction pm8xxx_gpio_getfunction pm8xxx_gpio_setfunction pm8xxx_gpio_of_xlatefunction pm8xxx_gpio_dbg_show_onefunction pm8xxx_gpio_dbg_showfunction pm8xxx_pin_populatefunction pm8xxx_irq_disablefunction pm8xxx_irq_enablefunction pm8xxx_domain_translatefunction pm8xxx_child_offset_to_irqfunction pm8xxx_child_to_parent_hwirqfunction pm8xxx_gpio_probefunction gpiochip_add_pin_rangefunction pm8xxx_gpio_remove
Annotated Snippet
struct pm8xxx_pin_data {
unsigned reg;
u8 power_source;
u8 mode;
bool open_drain;
bool output_value;
u8 bias;
u8 pull_up_strength;
u8 output_strength;
bool disable;
u8 function;
bool inverted;
};
struct pm8xxx_gpio {
struct device *dev;
struct regmap *regmap;
struct pinctrl_dev *pctrl;
struct gpio_chip chip;
struct pinctrl_desc desc;
unsigned npins;
};
static const struct pinconf_generic_params pm8xxx_gpio_bindings[] = {
{"qcom,drive-strength", PM8XXX_QCOM_DRIVE_STRENGTH, 0},
{"qcom,pull-up-strength", PM8XXX_QCOM_PULL_UP_STRENGTH, 0},
};
#ifdef CONFIG_DEBUG_FS
static const struct pin_config_item pm8xxx_conf_items[ARRAY_SIZE(pm8xxx_gpio_bindings)] = {
PCONFDUMP(PM8XXX_QCOM_DRIVE_STRENGTH, "drive-strength", NULL, true),
PCONFDUMP(PM8XXX_QCOM_PULL_UP_STRENGTH, "pull up strength", NULL, true),
};
#endif
static const char * const pm8xxx_groups[PM8XXX_MAX_GPIOS] = {
"gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8",
"gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15",
"gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
"gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
"gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio36",
"gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
"gpio44",
};
static const char * const pm8xxx_gpio_functions[] = {
PMIC_GPIO_FUNC_NORMAL, PMIC_GPIO_FUNC_PAIRED,
PMIC_GPIO_FUNC_FUNC1, PMIC_GPIO_FUNC_FUNC2,
PMIC_GPIO_FUNC_DTEST1, PMIC_GPIO_FUNC_DTEST2,
PMIC_GPIO_FUNC_DTEST3, PMIC_GPIO_FUNC_DTEST4,
};
static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl,
struct pm8xxx_pin_data *pin, int bank)
{
unsigned int val = bank << 4;
int ret;
ret = regmap_write(pctrl->regmap, pin->reg, val);
if (ret) {
dev_err(pctrl->dev, "failed to select bank %d\n", bank);
return ret;
}
ret = regmap_read(pctrl->regmap, pin->reg, &val);
if (ret) {
dev_err(pctrl->dev, "failed to read register %d\n", bank);
return ret;
}
return val;
}
static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl,
struct pm8xxx_pin_data *pin,
int bank,
u8 val)
{
int ret;
val |= PM8XXX_BANK_WRITE;
val |= bank << 4;
ret = regmap_write(pctrl->regmap, pin->reg, val);
if (ret)
dev_err(pctrl->dev, "failed to write register\n");
return ret;
}
Annotation
- Immediate include surface: `linux/gpio/driver.h`, `linux/interrupt.h`, `linux/module.h`, `linux/of.h`, `linux/of_irq.h`, `linux/platform_device.h`, `linux/regmap.h`, `linux/seq_file.h`.
- Detected declarations: `struct pm8xxx_pin_data`, `struct pm8xxx_gpio`, `function pm8xxx_read_bank`, `function pm8xxx_write_bank`, `function pm8xxx_get_groups_count`, `function pm8xxx_get_group_pins`, `function pm8xxx_get_functions_count`, `function pm8xxx_get_function_groups`, `function pm8xxx_pinmux_set_mux`, `function pm8xxx_pin_config_get`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.