drivers/pinctrl/renesas/gpio.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/renesas/gpio.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/renesas/gpio.c- Extension
.c- Size
- 9419 bytes
- Lines
- 396
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/device.hlinux/gpio/driver.hlinux/module.hlinux/pinctrl/consumer.hlinux/slab.hlinux/spinlock.hcore.h
Detected Declarations
struct sh_pfc_gpio_data_regstruct sh_pfc_gpio_pinstruct sh_pfc_chipfunction gpio_get_data_regfunction gpio_read_data_regfunction gpio_write_data_regfunction gpio_setup_data_regfunction gpio_setup_data_regsfunction gpio_pin_requestfunction gpio_pin_freefunction gpio_pin_set_valuefunction gpio_pin_direction_inputfunction gpio_pin_direction_outputfunction gpio_pin_getfunction gpio_pin_setfunction gpio_pin_to_irqfunction gpio_pin_setupfunction gpio_function_requestfunction gpio_function_setupfunction sh_pfc_add_gpiochipfunction sh_pfc_register_gpiochip
Annotated Snippet
struct sh_pfc_gpio_data_reg {
const struct pinmux_data_reg *info;
u32 shadow;
};
struct sh_pfc_gpio_pin {
u8 dbit;
u8 dreg;
};
struct sh_pfc_chip {
struct sh_pfc *pfc;
struct gpio_chip gpio_chip;
struct sh_pfc_window *mem;
struct sh_pfc_gpio_data_reg *regs;
struct sh_pfc_gpio_pin *pins;
};
static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
{
struct sh_pfc_chip *chip = gpiochip_get_data(gc);
return chip->pfc;
}
static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset,
struct sh_pfc_gpio_data_reg **reg,
unsigned int *bit)
{
int idx = sh_pfc_get_pin_index(chip->pfc, offset);
struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
*reg = &chip->regs[gpio_pin->dreg];
*bit = gpio_pin->dbit;
}
static u32 gpio_read_data_reg(struct sh_pfc_chip *chip,
const struct pinmux_data_reg *dreg)
{
phys_addr_t address = dreg->reg;
void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
return sh_pfc_read_raw_reg(mem, dreg->reg_width);
}
static void gpio_write_data_reg(struct sh_pfc_chip *chip,
const struct pinmux_data_reg *dreg, u32 value)
{
phys_addr_t address = dreg->reg;
void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
}
static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx)
{
struct sh_pfc *pfc = chip->pfc;
struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
const struct pinmux_data_reg *dreg;
unsigned int bit;
unsigned int i;
for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
for (bit = 0; bit < dreg->reg_width; bit++) {
if (dreg->enum_ids[bit] == pin->enum_id) {
gpio_pin->dreg = i;
gpio_pin->dbit = bit;
return;
}
}
}
BUG();
}
static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
{
struct sh_pfc *pfc = chip->pfc;
const struct pinmux_data_reg *dreg;
unsigned int i;
/* Count the number of data registers, allocate memory and initialize
* them.
*/
for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
;
chip->regs = devm_kcalloc(pfc->dev, i, sizeof(*chip->regs),
GFP_KERNEL);
Annotation
- Immediate include surface: `linux/device.h`, `linux/gpio/driver.h`, `linux/module.h`, `linux/pinctrl/consumer.h`, `linux/slab.h`, `linux/spinlock.h`, `core.h`.
- Detected declarations: `struct sh_pfc_gpio_data_reg`, `struct sh_pfc_gpio_pin`, `struct sh_pfc_chip`, `function gpio_get_data_reg`, `function gpio_read_data_reg`, `function gpio_write_data_reg`, `function gpio_setup_data_reg`, `function gpio_setup_data_regs`, `function gpio_pin_request`, `function gpio_pin_free`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.