drivers/pinctrl/renesas/pfc-r8a7778.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/renesas/pfc-r8a7778.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/renesas/pfc-r8a7778.c- Extension
.c- Size
- 106330 bytes
- Lines
- 3111
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/kernel.hlinux/pinctrl/pinconf-generic.hsh_pfc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* r8a7778 processor support - PFC hardware block
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
* Copyright (C) 2013 Cogent Embedded, Inc.
* Copyright (C) 2015 Ulrich Hecht
*
* based on
* Copyright (C) 2011 Renesas Solutions Corp.
* Copyright (C) 2011 Magnus Damm
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/pinctrl/pinconf-generic.h>
#include "sh_pfc.h"
#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_32(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_32(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_27(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP)
#define CPU_ALL_NOGP(fn) \
PIN_NOGP(CLKOUT, "B25", fn), \
PIN_NOGP(CS0, "A20", fn), \
PIN_NOGP(CS1_A26, "C20", fn)
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
GP_ALL(DATA), /* GP_0_0_DATA -> GP_4_26_DATA */
PINMUX_DATA_END,
PINMUX_FUNCTION_BEGIN,
GP_ALL(FN), /* GP_0_0_FN -> GP_4_26_FN */
/* GPSR0 */
FN_IP0_1_0, FN_PENC0, FN_PENC1, FN_IP0_4_2,
FN_IP0_7_5, FN_IP0_11_8, FN_IP0_14_12, FN_A1,
FN_A2, FN_A3, FN_IP0_15, FN_IP0_16,
FN_IP0_17, FN_IP0_18, FN_IP0_19, FN_IP0_20,
FN_IP0_21, FN_IP0_22, FN_IP0_23, FN_IP0_24,
FN_IP0_25, FN_IP0_26, FN_IP0_27, FN_IP0_28,
FN_IP0_29, FN_IP0_30, FN_IP1_0, FN_IP1_1,
FN_IP1_4_2, FN_IP1_7_5, FN_IP1_10_8, FN_IP1_14_11,
/* GPSR1 */
FN_IP1_23_21, FN_WE0, FN_IP1_24, FN_IP1_27_25,
FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6,
FN_IP2_11_9, FN_IP2_13_12, FN_IP2_16_14, FN_IP2_17,
FN_IP2_30, FN_IP2_31, FN_IP3_1_0, FN_IP3_4_2,
FN_IP3_7_5, FN_IP3_9_8, FN_IP3_12_10, FN_IP3_15_13,
FN_IP3_18_16, FN_IP3_20_19, FN_IP3_23_21, FN_IP3_26_24,
FN_IP3_27, FN_IP3_28, FN_IP3_29, FN_IP3_30,
FN_IP3_31, FN_IP4_0, FN_IP4_3_1, FN_IP4_6_4,
/* GPSR2 */
FN_IP4_7, FN_IP4_8, FN_IP4_10_9, FN_IP4_12_11,
FN_IP4_14_13, FN_IP4_16_15, FN_IP4_20_17, FN_IP4_24_21,
FN_IP4_26_25, FN_IP4_28_27, FN_IP4_30_29, FN_IP5_1_0,
FN_IP5_3_2, FN_IP5_5_4, FN_IP5_6, FN_IP5_7,
FN_IP5_9_8, FN_IP5_11_10, FN_IP5_12, FN_IP5_14_13,
FN_IP5_17_15, FN_IP5_20_18, FN_AUDIO_CLKA, FN_AUDIO_CLKB,
FN_IP5_22_21, FN_IP5_25_23, FN_IP5_28_26, FN_IP5_30_29,
FN_IP6_1_0, FN_IP6_4_2, FN_IP6_6_5, FN_IP6_7,
/* GPSR3 */
FN_IP6_8, FN_IP6_9, FN_SSI_SCK34, FN_IP6_10,
FN_IP6_12_11, FN_IP6_13, FN_IP6_15_14, FN_IP6_16,
FN_IP6_18_17, FN_IP6_20_19, FN_IP6_21, FN_IP6_23_22,
FN_IP6_25_24, FN_IP6_27_26, FN_IP6_29_28, FN_IP6_31_30,
FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_8_6,
FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,
FN_IP7_21, FN_IP7_24_22, FN_IP7_28_25, FN_IP7_31_29,
FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_10_9,
/* GPSR4 */
FN_IP8_13_11, FN_IP8_15_14, FN_IP8_18_16, FN_IP8_21_19,
FN_IP8_23_22, FN_IP8_26_24, FN_IP8_29_27, FN_IP9_2_0,
FN_IP9_5_3, FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12,
FN_IP9_17_15, FN_IP9_20_18, FN_IP9_23_21, FN_IP9_26_24,
FN_IP9_29_27, FN_IP10_2_0, FN_IP10_5_3, FN_IP10_8_6,
FN_IP10_12_9, FN_IP10_15_13, FN_IP10_18_16, FN_IP10_21_19,
FN_IP10_24_22, FN_AVS1, FN_AVS2,
Annotation
- Immediate include surface: `linux/io.h`, `linux/kernel.h`, `linux/pinctrl/pinconf-generic.h`, `sh_pfc.h`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.