drivers/pinctrl/renesas/pfc-r8a7779.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/renesas/pfc-r8a7779.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/renesas/pfc-r8a7779.c
Extension
.c
Size
148196 bytes
Lines
4374
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * r8a7779 processor support - PFC hardware block
 *
 * Copyright (C) 2011, 2013  Renesas Solutions Corp.
 * Copyright (C) 2011  Magnus Damm
 * Copyright (C) 2013  Cogent Embedded, Inc.
 */

#include <linux/kernel.h>

#include "sh_pfc.h"

#define CPU_ALL_GP(fn, sfx)						\
	PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_32(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_1(2, 0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_1(2, 1, fn, sfx),					\
	PORT_GP_1(2, 2, fn, sfx),					\
	PORT_GP_1(2, 3, fn, sfx),					\
	PORT_GP_1(2, 4, fn, sfx),					\
	PORT_GP_1(2, 5, fn, sfx),					\
	PORT_GP_1(2, 6, fn, sfx),					\
	PORT_GP_1(2, 7, fn, sfx),					\
	PORT_GP_1(2, 8, fn, sfx),					\
	PORT_GP_1(2, 9, fn, sfx),					\
	PORT_GP_1(2, 10, fn, sfx),					\
	PORT_GP_1(2, 11, fn, sfx),					\
	PORT_GP_1(2, 12, fn, sfx),					\
	PORT_GP_1(2, 13, fn, sfx),					\
	PORT_GP_1(2, 14, fn, sfx),					\
	PORT_GP_1(2, 15, fn, sfx),					\
	PORT_GP_1(2, 16, fn, sfx),					\
	PORT_GP_1(2, 17, fn, sfx),					\
	PORT_GP_1(2, 18, fn, sfx),					\
	PORT_GP_1(2, 19, fn, sfx),					\
	PORT_GP_1(2, 20, fn, sfx),					\
	PORT_GP_1(2, 21, fn, sfx),					\
	PORT_GP_1(2, 22, fn, sfx),					\
	PORT_GP_1(2, 23, fn, sfx),					\
	PORT_GP_1(2, 24, fn, sfx),					\
	PORT_GP_1(2, 25, fn, sfx),					\
	PORT_GP_1(2, 26, fn, sfx),					\
	PORT_GP_1(2, 27, fn, sfx),					\
	PORT_GP_1(2, 28, fn, sfx),					\
	PORT_GP_1(2, 29, fn, sfx),					\
	PORT_GP_CFG_1(2, 30, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_1(2, 31, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_25(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_1(3, 25, fn, sfx),					\
	PORT_GP_1(3, 26, fn, sfx),					\
	PORT_GP_1(3, 27, fn, sfx),					\
	PORT_GP_CFG_1(3, 28, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_1(3, 29, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_1(3, 30, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_1(3, 31, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_32(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_32(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP),		\
	PORT_GP_CFG_9(6, fn, sfx, SH_PFC_PIN_CFG_PULL_UP)

#define CPU_ALL_NOGP(fn)						\
	PIN_NOGP_CFG(ASEBRK_N_ACK, "ASEBRK#/ACK", fn, SH_PFC_PIN_CFG_PULL_UP), \
	PIN_NOGP_CFG(D0, "D0", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D1, "D1", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D2, "D2", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D3, "D3", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D4, "D4", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D5, "D5", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D6, "D6", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D7, "D7", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D8, "D8", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D9, "D9", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D10, "D10", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D11, "D11", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D12, "D12", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D13, "D13", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D14, "D14", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(D15, "D15", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, SH_PFC_PIN_CFG_PULL_UP), \
	PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP),		\
	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP)

enum {
	PINMUX_RESERVED = 0,

	PINMUX_DATA_BEGIN,
	GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */

Annotation

Implementation Notes