drivers/pinctrl/renesas/pfc-sh7264.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/renesas/pfc-sh7264.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/renesas/pfc-sh7264.c
Extension
.c
Size
56899 bytes
Lines
2132
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * SH7264 Pinmux
 *
 *  Copyright (C) 2012  Renesas Electronics Europe Ltd
 */

#include <linux/kernel.h>
#include <cpu/sh7264.h>

#include "sh_pfc.h"

enum {
	PINMUX_RESERVED = 0,

	PINMUX_DATA_BEGIN,
	/* Port A */
	PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
	/* Port B */
	PB22_DATA, PB21_DATA, PB20_DATA,
	PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,
	PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
	PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
	PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
	PB3_DATA, PB2_DATA, PB1_DATA,
	/* Port C */
	PC10_DATA, PC9_DATA, PC8_DATA,
	PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
	PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
	/* Port D */
	PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
	PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
	PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
	PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
	/* Port E */
	PE5_DATA, PE4_DATA,
	PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
	/* Port F */
	PF12_DATA,
	PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
	PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
	PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
	/* Port G */
	PG24_DATA,
	PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
	PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,
	PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
	PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
	PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
	PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
	/* Port H */
	/* NOTE - Port H does not have a Data Register, but PH Data is
	   connected to PH Port Register */
	PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
	PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
	/* Port I - not on device */
	/* Port J */
	PJ12_DATA,
	PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
	PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
	PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
	/* Port K */
	PK12_DATA,
	PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
	PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
	PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
	PINMUX_DATA_END,

	PINMUX_INPUT_BEGIN,
	FORCE_IN,
	/* Port A */
	PA3_IN, PA2_IN, PA1_IN, PA0_IN,
	/* Port B */
	PB22_IN, PB21_IN, PB20_IN,
	PB19_IN, PB18_IN, PB17_IN, PB16_IN,
	PB15_IN, PB14_IN, PB13_IN, PB12_IN,
	PB11_IN, PB10_IN, PB9_IN, PB8_IN,
	PB7_IN, PB6_IN, PB5_IN, PB4_IN,
	PB3_IN, PB2_IN, PB1_IN,
	/* Port C */
	PC10_IN, PC9_IN, PC8_IN,
	PC7_IN, PC6_IN, PC5_IN, PC4_IN,
	PC3_IN, PC2_IN, PC1_IN, PC0_IN,
	/* Port D */
	PD15_IN, PD14_IN, PD13_IN, PD12_IN,
	PD11_IN, PD10_IN, PD9_IN, PD8_IN,
	PD7_IN, PD6_IN, PD5_IN, PD4_IN,
	PD3_IN, PD2_IN, PD1_IN, PD0_IN,
	/* Port E */
	PE5_IN, PE4_IN,

Annotation

Implementation Notes