drivers/pinctrl/samsung/pinctrl-samsung.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/samsung/pinctrl-samsung.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/samsung/pinctrl-samsung.c- Extension
.c- Size
- 41316 bytes
- Lines
- 1547
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/err.hlinux/gpio/driver.hlinux/init.hlinux/io.hlinux/irqdomain.hlinux/of.hlinux/platform_device.hlinux/property.hlinux/seq_file.hlinux/slab.hlinux/spinlock.h../core.hpinctrl-samsung.h
Detected Declarations
function samsung_get_group_countfunction samsung_get_group_pinsfunction reserve_mapfunction add_map_muxfunction add_map_configsfunction add_configfunction samsung_dt_free_mapfunction samsung_dt_subnode_to_mapfunction of_property_for_each_stringfunction samsung_dt_node_to_mapfunction for_each_child_of_node_scopedfunction samsung_pin_dbg_showfunction samsung_get_functions_countfunction samsung_pinmux_get_groupsfunction pin_to_reg_bankfunction samsung_pinmux_setupfunction samsung_pinmux_set_muxfunction samsung_pinconf_rwfunction samsung_pinconf_setfunction samsung_pinconf_getfunction samsung_pinconf_group_setfunction samsung_pinconf_group_getfunction samsung_gpio_set_vlauefunction samsung_gpio_setfunction samsung_gpio_getfunction samsung_gpio_set_directionfunction samsung_gpio_direction_inputfunction samsung_gpio_direction_outputfunction gpiod_to_irqfunction samsung_add_pin_rangesfunction samsung_pinctrl_create_functionfunction for_each_child_of_nodefunction for_each_child_of_node_scopedfunction samsung_pinctrl_parse_dtfunction samsung_pinctrl_registerfunction samsung_pinctrl_unregisterfunction samsung_pud_value_initfunction samsung_gpio_set_pudfunction samsung_gpio_set_configfunction samsung_gpiolib_registerfunction samsung_pinctrl_get_soc_data_for_of_aliasfunction samsung_banks_node_putfunction samsung_banks_node_getfunction for_each_gpiochip_nodefunction samsung_pinctrl_get_soc_datafunction samsung_pinctrl_probefunction samsung_pinctrl_suspendfunction samsung_pinctrl_resume
Annotated Snippet
if (!ret) {
config = PINCFG_PACK(cfg_params[i].param, val);
ret = add_config(dev, &configs, &num_configs, config);
if (ret < 0)
goto exit;
/* EINVAL=missing, which is fine since it's optional */
} else if (ret != -EINVAL) {
dev_err(dev, "could not parse property %s\n",
cfg_params[i].property);
}
}
reserve = 0;
if (has_func)
reserve++;
if (num_configs)
reserve++;
ret = of_property_count_strings(np, "samsung,pins");
if (ret < 0) {
dev_err(dev, "could not parse property samsung,pins\n");
goto exit;
}
reserve *= ret;
ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
if (ret < 0)
goto exit;
of_property_for_each_string(np, "samsung,pins", prop, group) {
if (has_func) {
ret = add_map_mux(map, reserved_maps,
num_maps, group, np->full_name);
if (ret < 0)
goto exit;
}
if (num_configs) {
ret = add_map_configs(dev, map, reserved_maps,
num_maps, group, configs,
num_configs);
if (ret < 0)
goto exit;
}
}
ret = 0;
exit:
kfree(configs);
return ret;
}
static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
struct device_node *np_config,
struct pinctrl_map **map,
unsigned *num_maps)
{
struct samsung_pinctrl_drv_data *drvdata;
unsigned reserved_maps;
int ret;
drvdata = pinctrl_dev_get_drvdata(pctldev);
reserved_maps = 0;
*map = NULL;
*num_maps = 0;
if (!of_get_child_count(np_config))
return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
np_config, map,
&reserved_maps,
num_maps);
for_each_child_of_node_scoped(np_config, np) {
ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
&reserved_maps, num_maps);
if (ret < 0) {
samsung_dt_free_map(pctldev, *map, *num_maps);
return ret;
}
}
return 0;
}
#ifdef CONFIG_DEBUG_FS
/* Forward declaration which can be used by samsung_pin_dbg_show */
static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
unsigned long *config);
static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN",
Annotation
- Immediate include surface: `linux/clk.h`, `linux/err.h`, `linux/gpio/driver.h`, `linux/init.h`, `linux/io.h`, `linux/irqdomain.h`, `linux/of.h`, `linux/platform_device.h`.
- Detected declarations: `function samsung_get_group_count`, `function samsung_get_group_pins`, `function reserve_map`, `function add_map_mux`, `function add_map_configs`, `function add_config`, `function samsung_dt_free_map`, `function samsung_dt_subnode_to_map`, `function of_property_for_each_string`, `function samsung_dt_node_to_map`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.