drivers/pinctrl/sophgo/pinctrl-cv18xx.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/sophgo/pinctrl-cv18xx.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
Extension
.c
Size
11553 bytes
Lines
444
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cv1800_priv {
	void __iomem	*regs[2];
	unsigned int	num_power_cfg;
	u32		power_cfg[] __counted_by(num_power_cfg);
};

static unsigned int cv1800_dt_get_pin_mux(u32 value)
{
	return (value >> 16) & GENMASK(7, 0);
}

static unsigned int cv1800_dt_get_pin_mux2(u32 value)
{
	return (value >> 24) & GENMASK(7, 0);
}

#define cv1800_pinctrl_get_component_addr(pctrl, _comp)		\
	((pctrl)->regs[(_comp)->area] + (_comp)->offset)

static int cv1800_set_power_cfg(struct sophgo_pinctrl *pctrl,
				u8 domain, u32 cfg)
{
	struct cv1800_priv *priv = pctrl->priv_ctrl;

	if (domain >= pctrl->data->npds)
		return -ENOTSUPP;

	if (priv->power_cfg[domain] && priv->power_cfg[domain] != cfg)
		return -EINVAL;

	priv->power_cfg[domain] = cfg;

	return 0;
}

static int cv1800_get_power_cfg(struct sophgo_pinctrl *pctrl,
				u8 domain)
{
	struct cv1800_priv *priv = pctrl->priv_ctrl;

	return priv->power_cfg[domain];
}

#define PIN_BGA_ID_OFFSET		8
#define PIN_BGA_ID_MASK			0xff

static const char *const io_type_desc[] = {
	"1V8",
	"18OD33",
	"AUDIO",
	"ETH"
};

static const char *cv1800_get_power_cfg_desc(struct sophgo_pinctrl *pctrl,
					     u8 domain)
{
	return pctrl->data->pdnames[domain];
}

static void cv1800_pctrl_dbg_show(struct pinctrl_dev *pctldev,
				  struct seq_file *seq, unsigned int pin_id)
{
	struct sophgo_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
	struct cv1800_priv *priv = pctrl->priv_ctrl;
	const struct sophgo_pin *sp = sophgo_get_pin(pctrl, pin_id);
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
	u32 pin_hwid = pin->pin.id;
	u32 value;
	void __iomem *reg;

	if (pin_hwid >> PIN_BGA_ID_OFFSET)
		seq_printf(seq, "pos: %c%u ",
			   'A' + (pin_hwid >> PIN_BGA_ID_OFFSET) - 1,
			   pin_hwid & PIN_BGA_ID_MASK);
	else
		seq_printf(seq, "pos: %u ", pin_hwid);

	seq_printf(seq, "power-domain: %s ",
		   cv1800_get_power_cfg_desc(pctrl, pin->power_domain));
	seq_printf(seq, "type: %s ", io_type_desc[type]);

	reg = cv1800_pinctrl_get_component_addr(priv, &pin->mux);
	value = readl(reg);
	seq_printf(seq, "mux: 0x%08x ", value);

	if (pin->pin.flags & CV1800_PIN_HAVE_MUX2) {
		reg = cv1800_pinctrl_get_component_addr(priv, &pin->mux2);
		value = readl(reg);
		seq_printf(seq, "mux2: 0x%08x ", value);

Annotation

Implementation Notes